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MFS2401AVBA0ES Datasheet(PDF) 90 Page - NXP Semiconductors |
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MFS2401AVBA0ES Datasheet(HTML) 90 Page - NXP Semiconductors |
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90 / 151 page ![]() NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver Bit Symbol Description POR, self-clear Real-time status of debug mode 0 Device is not in Debug mode 1 Device is in Debug mode 3 DBG_MODE Real-time information Leave Debug mode 0 No action 1 Leave Debug mode 4 DBG_EXIT POR, Self-clear Request a software POR of FS24 (reset the digital and restart from POR) 0 No action 1 Software POR is requested 6 SOFTPOR_REQ POR, Self-clear Select the power down time slot 0 TSLOT = 2 ms 1 TSLOT = 0 ms 8 TSLOT_DOWN_CFG POR Bypass unnecessary slots 0 Slots are not bypassed 1 Bypass unnecessary slots during power down or wake-up from LPON 9 SLOT_BYP OTP fuse load Bypass the OTP loading during power up 0 OTP loading is not bypassed 1 OTP loading is bypassed 10 LOAD_OTP_BYP POR or in main FSM M4 state VBOS to V1 switch always enabled 00000 - 00001 M1 00010 M2 00011 M3 00100 M4 00101 M5 00110 M6 00111 M7 01000 M8 01001 M9 01010 M10 01011 M11 01100 M12 11 to 15 M_FSM_STATE 01101 M13 Table 69. M_SYS1_CFG register bit description...continued FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 90 / 151 |
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