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MFS2401AVBA0ES Datasheet(PDF) 68 Page - NXP Semiconductors |
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MFS2401AVBA0ES Datasheet(HTML) 68 Page - NXP Semiconductors |
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68 / 151 page ![]() NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver ERRMON_FLT_POLARITY Condition to detect a fault 0 (default) High to low level 1 Low to high level Table 36. Signal polarity to detect an error on HVIO1 pin ERRMON_FS_REACTION Reaction 0 Error on HVIO1 pin asserts LIMP0 only 1 (default) Error on HVIO1 pin asserts LIMP0 and RSTB Table 37. Reaction when an error is detected HVIO1 pin ERRMON_ACK_TIME[1:0] Time allowed for acknowledgment 00 0 ms 01 (default) 8 ms 10 16 ms 11 32 ms Table 38. Allowed time before receiving microcontroller acknowledge when an external IC error is detected ERRMON Error flag on HVIO1 0 No error detected by FS24 1 Error detected. FS24 is waiting for an acknowledgment within the allowed time. Table 39. Error flag for external IC monitoring ERRMON_ACK Error flag on HVIO1 0 No error reported by MCU 1 Error detected and reported to FS24 by MCU Table 40. Acknowledgment from MCU register The acknowledgment by the MCU is done through SPI communication according to Figure 42: FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 68 / 151 |
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