MFS2401AVBA0ES datasheet(61/151 Pages) NXP

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NXP Semiconductors

FS2400

Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver

When the watchdog is disabled (for example, RSTb event or transition to LPON with WD_DIS_LPON = 1), the

watchdog configuration is reset as it would be after a POR. The watchdog token is set to 0x5AB2,the window

period is set to 256 ms, and the watchdog type is set to timeout watchdog.

WDW_PERIOD[3:0]

Watchdog window period

0000

DISABLE (infinite open window)

0001

1 ms

0010

2 ms

0011

4 ms

0100

8 ms

0101

16 ms

0110

32 ms

0111

64 ms

1000

128 ms

1001 (default)

256 ms

1010

512 ms

0011

1024 ms

1100

2048 ms

1101

4096 ms

1110

8192 ms

1111

16384 ms

Table 26. Watchdog window period configuration

19.2.1 Watchdog selection

Two types of watchdog monitoring, timeout and window watchdog, are implemented and can be selected and

changed during operation by SPI using WDW_EN bit.

WDW_EN

Watchdog type selection

Timeout watchdog (default)

Window watchdog

Table 27. Watchdog type configuration

19.2.1.1 Timeout watchdog

The timeout watchdog is the default configuration at start up. In this mode, the watchdog period is considered

fully open, and the MCU writes the correct value in WD_ANSWER register before the period ends. If the answer

is wrong, or if the answer is not sent before the watchdog timer overflows, the WD error counter is incremented

and WD_NOK_I flag is set to 1.

19.2.1.2 Window watchdog

The window watchdog can be enabled by SPI by setting WDW_EN bit at 1. In this mode, the watchdog period

is divided in two. The first half is said closed and the second is said open. The MCU writes the correct value

in WD_ANSWER register during the open window. If the answer is wrong, or if the answer is sent during

the closed window, or if the answer is not sent before the watchdog timer overflows, the WD error counter is

incremented and WD_NOK_I flag is set to 1.

FS2400

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Product data sheet

Rev. 4 — 23 October 2024

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