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MFS2401AVBA0ES Datasheet(PDF) 96 Page - NXP Semiconductors

Part # MFS2401AVBA0ES
Description  Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
PDF  151 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2401AVBA0ES Datasheet(HTML) 96 Page - NXP Semiconductors

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NXP Semiconductors
FS2400
Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
Bit
Symbol
Description
POR
Inhibit V3 undervoltage interrupt
0 Interrupt is not inhibited
1 Interrupt is inhibited
6
V3UV_M
POR
Inhibit V1 undervoltage interrupt
0 Interrupt is not inhibited
1 Interrupt is inhibited
8
V1UV_M
POR
Inhibit V1 undervoltage in LPON interrupt
0 Interrupt is not inhibited
1 Interrupt is Inhibited
9
V1UVLP_M
POR
Inhibit V3 thermal shutdown interrupt
0 Interrupt is not inhibited
1 Interrupt is inhibited
10
V3TSD_M
POR
Inhibit V1 thermal shutdown interrupt
0 Interrupt is not inhibited
1 Interrupt is inhibited
12
V1TSD_M
POR
Inhibit V1 thermal warning interrupt
0 Interrupt is not inhibited
1 Interrupt is inhibited
13
V1TWARN_M
POR
Inhibit V1 undervoltage pre-warning interrupt
0 Interrupt is not inhibited
1 Interrupt is inhibited
14
V1UVW_M
POR
Inhibit V1 low side overcurrent interrupt
0 Interrupt is not inhibited
1 Interrupt is inhibited
15
V1LSOC_M
POR
Table 77. M_REG_MSK register bit description...continued
22.11 M_REG1_FLG
Bit
15
14
13
12
11
10
9
8
Write
V0UV_I
V0OV_I
0
0
0
0
0
0
Read
V0UV_I
V0OV_I
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
Write
0
0
0
0
0
0
0
0
Read
0
0
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
Table 78. M_REG_FLG register bit allocation
FS2400
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 4 — 23 October 2024
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