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MFS2401AVBA0ES Datasheet(PDF) 65 Page - NXP Semiconductors

Part # MFS2401AVBA0ES
Description  Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
PDF  151 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2401AVBA0ES Datasheet(HTML) 65 Page - NXP Semiconductors

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NXP Semiconductors
FS2400
Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
19.3.1 V0MON (VMON_EXT) monitoring
VMON_EXT input pin can be connected to an external regulator. The regulator connected to VMON_EXT must
be at least 1 V to be compatible with overvoltage and undervoltage monitoring thresholds. An external resistor
bridge must be used to divide the regulator voltage if higher than 1 V. The resistor bridge middle point voltage
must be set to 1 V. The external resistors accuracy must be at least ±1 %, to ensure a total accuracy of ±2.5 %
with the internal thresholds accuracy (±1.5 %).
The MCU can monitor VMON_EXT pin voltage using the AMUX by selecting channel 18, see Section 15.3.
19.3.2 VxMON monitoring (x = 1, 3)
V1 and V3 regulators are monitored via the corresponding V1 and V3 pins, which also serve as feedback
pins. The expected voltage for each regulator is automatically selected based on the OTP output voltage
configuration.
Each voltage monitoring channel is connected to a pulldown resistor to detect an undervoltage in case of
disconnection.
The VxMON UV/OV threshold have ±1 % accuracy (trimmed at 5 V setting, 5 % VMON threshold).
19.3.3 VxMON UV/OV threshold
The OV and UV thresholds are configured independently for each VxMON (x = 0, 1, 3) by OTP at
VxMON_UVTH_OTP[3:0] and VxMON_OVTH_OTP[3:0]. UV thresholds are configurable from 96.5 % to 91.5
% and OV thresholds are configurable from 102.5 % to 110 %. When a regulator is configured at 5 V, five
additional UV thresholds are available at 62 %, 63.5 %, 64 %, 64.5 %, and 65 %.
VMONx_UVTH_OTP[3:0]
VMONx_OVTH_OTP[3:0]
VMONx undervoltage
threshold configuration
VMONx overvoltage
threshold configuration
0000
65 %
102.5 %
0001
64.5 %
103.0 %
0010
96.5 %
103.5 %
0011
96.0 %
104.0 %
0100
95.5 %
104.5 %
0101
95.0 %
105.0 %
0110
94.5 %
105.5 %
0111
94.0 %
106.0 %
1000
93.5 %
106.5 %
1001
93.0 %
107.0 %
1010
92.5 %
107.5 %
1011
92.0 %
108.0 %
1100
91.5 %
108.5 %
1101
64 %
109.0 %
1110
63.5 %
109.5 %
1111
62 %
110.0 %
Table 33. VMON UV/OV threshold configuration
FS2400
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 4 — 23 October 2024
Document feedback
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