 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
MFS2401AVBA0ES Datasheet(PDF) 74 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
MFS2401AVBA0ES Datasheet(HTML) 74 Page - NXP Semiconductors |
|
|
74 / 151 page  NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver TA = -40 °C to 115 °C, unless otherwise specified. VSUP = 5.5 V to 40 V, unless otherwise specified. All voltages referenced to ground. Symbol Parameter Min Typ Max Unit RSTBILIM Current limitation 4 - 22 mA Dynamic electrical characteristics RSTBTFB Feedback filtering time 8 10 15 us RSTBTSC Short- to high-detection timer 500 650 800 us RSTBTLG Long pulse (configurable with RSTB_DUR bit) 9 - 11 ms RSTBTST Short pulse (configurable with RSTB_DUR bit) 0.9 - 1.1 ms RSTBT8S 8 second timer 7 8 9 s RSTBTFALL Fall time (pullup to VDDIO = 5 V, 1 nF output capacitor) - - 8 us RSTBTRELEASE Time to release RSTB from POR or LPOFF - with all slots used - with RSTB_DUR = 1 (1 ms) - 4 6 ms External components RSTBRPU External pullup resistor to VDDIO (nominal) - 5.1 - kΩ RSTBCOUT External filtering capacitor (optional depending on the EMC requirements) - 1 - nF Table 46. RSTB electrical characteristics...continued 19.6.2 LIMP0 as a safety output LIMP0 is an open-drain output that can be used to transition the system in safe state. It is released high by default. It is asserted low in case of fault and depending on the fault impact configuration. In Low-power modes (LPON and LPOFF), LIMP0 works as it does in Normal mode. LIMP0 requires an external pullup resistor to VSUP or VDDIO, a 10 nF filtering capacitor to GND for immunity when LIMP0 is a local pin, and an additional RC network when LIMP0 is a global pin to be robust against ESD GUN and ISO 7637 transient pulses. A weak internal pulldown RPD ensures LIMP0 low level in case of pin lift. An internal pulldown RPD_STUP ensures LIMP0 is released at startup LIMP0 assertion depends on the device configuration during INIT phase. LIMP0 can also be asserted at MCU request by SPI, to check the correct HW connection. aaa-046863 LOGIC RPD 10 kΩ 5.1 kΩ 10 nF VSUP/VDDIO To Fail-safe circuitry LIMP0 22 nF RPD_STUP Figure 46. LIMP0 pin implementation FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 74 / 151 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
