 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
MFS2401AVBA0ES Datasheet(PDF) 98 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
MFS2401AVBA0ES Datasheet(HTML) 98 Page - NXP Semiconductors |
|
|
98 / 151 page  NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver Bit Symbol Description Request to assert HVIO1 when configured as an output 0 No effect (IO remain in its current state) 1 Request to assert HVIO1 low 8 HVIO1LO POR, self-clear Request to release HVIO1 when configured as an output 0 No effect (IO remain in its current state) 1 Request to release HVIO1 high 9 HVIO1HI POR, self-clear Select the internal pulldown/up on HVIO1 pin 00 HVIO1 internal pulldown and pullup are disabled 01 HVIO1 internal pulldown is enabled and pullup is disabled 10 HVIO1 internal pulldown is disabled and pullup is enabled 11 HVIO1 internal pulldown and pullup are configured as cell repeater 10 to 11 HVIO1PUPUD OTP fuse load Select the internal pulldown/up on WAKE3 pin 00 WAKE3 internal pulldown and pullup are disabled 01 WAKE3 internal pulldown is enabled and pullup is disabled 10 WAKE3 internal pulldown is disabled and pullup is enabled 11 WAKE3 internal pulldown and pullup are configured as cell repeater 12 to 13 WK3PUPD OTP fuse load Select the internal pulldown/up on WAKE2 pin 00 WAKE2 internal pulldown and pullup are disabled 01 WAKE2 internal pulldown is enabled and pullup is disabled 10 WAKE2 internal pulldown is disabled and pullup is enabled 11 WAKE2 internal pulldown and pullup are configured as cell repeater 14 to 15 WK2PUPD OTP fuse load Table 83. M_IO_CTRL register bit description 22.14 M_IO_TIMER_FLG Bit 15 14 13 12 11 10 9 8 Write 0 0 0 0 0 0 0 LDT_I Read 0 0 0 0 0 0 0 LDT_I Reset 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write 0 0 0 0 HVIO1_I WK3_I WK2_I 0 Read 0 0 0 0 HVIO1_I WK3_I WK2_I 0 Reset 0 0 0 0 0 0 0 0 Table 84. M_IO_TIMER_FLG register bit allocation FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 98 / 151 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
