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MFS2401AVBA0ES Datasheet(PDF) 77 Page - NXP Semiconductors |
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MFS2401AVBA0ES Datasheet(HTML) 77 Page - NXP Semiconductors |
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77 / 151 page  NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver 20 MCU communication The FS24 provides SPI interface for device configuration, control and diagnostic, in Normal and LPON modes. 20.1 SPI communication The FS24 provides a 32-bits SPI interface with the following arrangement: Primary output secondary in bits (MOSI): • Bits 31 to 25: register address • Bit 24: read/write (For reading Bit 24 = ‘0’; For writing Bit 24 = ‘1’) • Bits 23 to 8: control bits • Bits 7 to 0: cyclic redundant check (CRC) Primary input secondary out bits (MISO): • Bits 31 to 24: general device status • Bits 23 to 8: device internal control register content • Bits 7 to 0: cyclic redundant check (CRC) The digital SPI pins (CSB, SCLK, MOSI, MISO) are referenced to VDDIO. The MCU is the master driving MOSI. FS24 is the slave driving MISO. The MISO data is latched at the SCLK rising edge and MOSI data is latched at the SCLK falling edge. MSB is sent first. In write command, MISO [31:24] bits are the general status flags, [23:8] bits are all 0 and MISO [7:0] is the CRC of the message sent by the FS24. In read command, MOSI [23:8] bits are all 0 and MOSI [7:0] is the CRC of the message sent by the MCU. Table 50 and Table 51 describe SPI communication protocol for writing data into the FS24 or reading data from the FS24. B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 B21 B20 B19 B18 B17 B16 MOSI Register address [6:0] R/W Write data [15:8] MISO 0 WD_G PHYG WUG IOG COMG VSUPG VXG Read data [15:8] B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 MOSI Write data [7:0] CRC [7:0] MISO Read data [7:0] CRC [7:0] - response Table 50. SPI write command message construction B31 B30 B29 B28 B27 B26 B25 B24 B23 B22 B21 B20 B19 B18 B17 B16 MOSI Register address [6:0] R/W 0x00 MISO 0 WD_G PHYG WUG IOG COMG VSUPG VXG Read data [15:8] B15 B14 B13 B12 B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0 MOSI 0x00 CRC [7:0] MISO Read data [7:0] CRC [7:0] - response Table 51. SPI read command message construction FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 77 / 151 |
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