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MFS2401AVBA0ES Datasheet(PDF) 55 Page - NXP Semiconductors |
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MFS2401AVBA0ES Datasheet(HTML) 55 Page - NXP Semiconductors |
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55 / 151 page ![]() NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver aaa-046852 CAN_OFF CAN_WAKE_ CAPABLE CAN_LISTEN _ONLY CAN_ACTIVE CAN_EN_OTP & (CAN_MODE != 00 or CAN_WUEN != 00) V3_UV = 1 or CAN_MODE = 00 or FS24_MODE != NORMAL V3_UV = 1 or CAN_MODE = 00 or FS24_MODE != NORMAL V3_UV = 0 & (CANTXD = 1 & CAN_MODE = 1x) & FS24_MODE = NORMAL & CAN_TSD = 0 V3_UV = 0 & (CAN_MODE = 01 or (CANTXD = 0 & CAN_MODE = 1x )) & FS24_MODE = NORMAL (CAN_MODE = 01 & FS24_MODE = NORMAL) or CAN_TSD = 1 or CAN_TXD_TO = 1 From any state: POR or CAN_EN_OTP = 0 or (CAN_MODE = 00 & CAN_WUEN = 00) or (CAN_WUEN = 00 & FS24_MODE != NORMAL) or (RSTB or LIMP0 asserted & CAN_FS_DIS = 0) V3_UV = 0 & CANTXD = 1 & CAN_MODE = 1x & FS24_MODE = NORMAL Figure 35. CAN transceiver state machine 18.1.1.1 CAN off mode When the CAN mode is set to 2b’00 and the CAN wake-up capability is disabled, or if the device is not in Normal mode, for example in LPON or LPOFF modes, and the wake-up capability is disabled, the CAN transceiver is in OFF mode. The CAN transceiver can also transition to OFF mode if RSTB or LIMP0 is asserted and the MCU has set the CAN_FS_DIS bit to 0. In this mode, the normal and low-power receivers and the transmitter of the CAN transceiver are disabled, the CANH and CANL pins are set high ohmic, and the CANRXD pin is driven high. 18.1.1.2 CAN Wake-capable mode The CAN transceiver is in Wake-capable mode as soon as the CAN mode is different from 2b’00 or as soon as the wake-up capability of the CAN is enabled, regardless of the device state once powered up. In this mode, the CAN transmitter and the CAN normal receiver are disabled. Only the low-power wake-capable receiver is enabled to allow wake-up pattern detection and device wake-up. The CANH and CANL pins are biased to ground via the common-mode input resistor RCAN_IN_CM and the CANRXD pin is driven high. FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 55 / 151 |
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