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MFS2401AVBA0ES Datasheet(PDF) 63 Page - NXP Semiconductors |
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MFS2401AVBA0ES Datasheet(HTML) 63 Page - NXP Semiconductors |
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63 / 151 page  NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver aaa-046857 WD refresh NOT OK WD OFF 0 1 2 3 4 5 5 7 8 56 WD Refresh OK WD Refresh OK WD Refresh OK WD Refresh OK WD Refresh OK WD Refresh OK WD Refresh OK WD Refresh OK WD Refresh OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD_ERR_LIMIT = 00 WD refresh NOT OK WD OFF 0 1 2 3 4 5 6 WD Refresh OK WD Refresh OK WD Refresh OK WD Refresh OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD_ERR_LIMIT = 01 WD Refresh OK WD Refresh OK WD refresh NOT OK WD OFF 0 1 2 3 4 WD refresh NOT OK WD refresh NOT OK WD refresh NOT OK WD_ERR_LIMIT = 10 WD Refresh OK WD Refresh OK WD Refresh OK WD Refresh OK WD refresh NOT OK WD OFF 0 1 2 WD_ERR_LIMIT = 11 Figure 40. Watchdog error counter configurations 19.2.3 Watchdog refresh counter The watchdog refresh counter is used to decrement the fault error counter. Each time the watchdog is properly refreshed, the watchdog refresh counter is incremented by 1. Each time the watchdog refresh counter reaches its maximum value (6 by default) and if next WD refresh is also good, the fault error counter is decremented by 1. Whatever the position the watchdog refresh counter is in, each time there is a wrong refresh watchdog, the watchdog refresh counter is reset to 0. To allow flexibility in the application, the maximum value of this watchdog refresh counter is configurable with the WD_RFR_LIMIT[1:0] bits during the INIT_FS phase. WD_RFR_LIMIT[1:0] Watchdog refresh counter value 00 (default) 6 01 4 10 2 11 1 Reset condition POR Table 30. Watchdog refresh counter limit configuration The watchdog refresh counter value can be read by the MCU for diagnostic with the WD_RFR_CNT[2:0] bits. FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 63 / 151 |
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