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MFS2401AVBA0ES Datasheet(PDF) 12 Page - NXP Semiconductors

Part # MFS2401AVBA0ES
Description  Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
PDF  151 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2401AVBA0ES Datasheet(HTML) 12 Page - NXP Semiconductors

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NXP Semiconductors
FS2400
Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
Pin
Pin name
Type
Description
14
MISO
Digital output
SPI bus. Master Input Slave Output
15
MOSI
Digital input
SPI bus. Master Output Slave Input
16
SCK
Digital input/output
SPI bus. Clock input
17
CSB
Digital input/output
SPI bus. Chip select (active low)
18
RSTB
Digital input/output
Reset input/output. Active low. The main function is to reset the MCU. Reset
input voltage is monitored in order to detect external reset and fault condition.
19
INTB
Digital output
Interrupt output
20
PGND
Ground
Power ground connection (V1 HVBUCK)
21
V1_SW
Analog input/output
Switching node (V1 HVBUCK)
22
V1_IN
Analog input
V1 regulator input voltage
23
BOOT
Analog input/output
V1 bootstrap capacitor (V1 HVBUCK)
24
LIMP0/GPO
Digital output
LIMP home-mode output 0. Active low (high by default) / general-purpose output
25
VMON_EXT
Analog input
External voltage monitoring input
26
VBOS
Analog output
Best of supply output voltage
27
V1
Analog output
V1 regulator output voltage
28
VDDIO
Analog input
Input voltage for SPI and AMUX
29
AMUX
Analog output
Multiplexed output to be connected to an MCU ADC
with selection of the analog parameter though SPI.
30
NC
Not connected
Not connected
31
VSUP
Analog input
Power supply of the device
32
WAKE2/HID0
Analog input
Wake-up input 2 / Hardware ID 0
Table 3. Pin description...continued
6.2.1 Connection of unused pins
Pin
Pin name
Type
Description
1
WAKE3/HID1
Analog input
Open (WAKE3PUPD_OTP = 01)
2
V3_IN
Analog input
Grounded
3
V3
Analog output
Grounded or open
4
VCC5CAN
Analog input
Grounded
5
CANH
Analog input/output
Open
6
CANL
Analog input/output
Open
7
GNDCAN
Ground
Connection mandatory
8
HVIO1
Digital input/output
Open (HVIO1PUPD_OTP = 01)
9
CANTXD
Digital input
Open (200 kΩ internal pull up to VDDIO)
10
CANRXD
Digital output
Open (push-pull structure)
11
DEBUG
Analog input
Connection mandatory to GND in application mode
12
VDIG
Analog output
Connection mandatory
13
GND_IO
Ground
Connection mandatory
14
MISO
Digital output
Open
15
MOSI
Digital input
Open (200 kΩ internal pull up to VDDIO)
16
SCK
Digital input/output
Connection mandatory
Table 4. Connection of unused pins
FS2400
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 4 — 23 October 2024
Document feedback
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