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MFS2401AVBA0ES Datasheet(PDF) 119 Page - NXP Semiconductors |
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MFS2401AVBA0ES Datasheet(HTML) 119 Page - NXP Semiconductors |
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119 / 151 page ![]() NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver Bit Symbol Description Disable the RSTB low 8 s timer 0 RSTB low 8 s timer is enabled 1 RSTB low 8 s time is disabled 13 RSTB8S_DIS OTP Fuse load Disable the external RSTB monitoring (except RSTB 8 s time out) 0 External RSTB monitoring is enabled 1 External RSTB monitoring is disabled 14 EXT_RSTB_DIS POR Enable the RSTB request by the MCU 0 RSTB_REQ disabled 1 RSTB_REQ enabled 15 RSTB_REQ_EN POR Table 129. FS_I_FSSM_CFG register bit description...continued 23.5 FS_I_WD_CFG Bit 15 14 13 12 11 10 9 8 Write 0 WD_RSTB_ IMPACT 0 WD_LIMP0_ IMPACT WD_DIS_ LPON WD_RFR_LIMIT WD_ERR_ LIMIT Read 0 WD_RSTB_ IMPACT 0 WD_LIMP0_ IMPACT WD_DIS_ LPON WD_RFR_LIMIT WD_ERR_ LIMIT Reset 0 1 0 1 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write WD_ERR_LIMIT 0 0 Read WD_ERR_LIMIT WD_RFR_CNT WD_ERR_CNT Reset 1 0 0 0 0 0 0 0 Table 130. FS_I_WD_CFG register bit allocation FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 119 / 151 |
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