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MFS2401AVBA0ES Datasheet(PDF) 120 Page - NXP Semiconductors |
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MFS2401AVBA0ES Datasheet(HTML) 120 Page - NXP Semiconductors |
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120 / 151 page  NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver Bit Symbol Description Reflect the value of the watchdog error counter 0000 0 0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 1000 8 1001 8 1010 9 1011 10 1100 11 1101 12 1110 12 1111 12 0 to 3 WD_ERR_CNT POR Reflect the value of the watchdog refresh counter 000 0 001 1 010 2 011 3 100 4 101 5 110 6 111 7 4 to 6 WD_RFR_CNT POR Configure the watchdog error counter limit 00 8 01 6 10 4 11 2 7 to 8 WD_ERR_LIMIT POR Configure the watchdog refresh counter limit 00 6 01 4 10 2 11 1 9 to 10 WD_RFR_LIMIT POR Automatically disable the watchdog in LPON mode (when GO2LPON) 0 WD stays enabled in LPON 1 WD is disabled in LPON 11 WD_DIS_LPON POR Table 131. FS_I_WD_CFG register bit description FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 120 / 151 |
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