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MFS2401AVBA0ES Datasheet(PDF) 151 Page - NXP Semiconductors

Part # MFS2401AVBA0ES
Description  Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
PDF  151 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2401AVBA0ES Datasheet(HTML) 151 Page - NXP Semiconductors

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NXP Semiconductors
FS2400
Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
20.1
SPI communication ..........................................77
20.1.1
Cyclic redundant check ................................... 79
20.1.2
Electrical characteristics .................................. 80
21
Register mapping .......................................... 82
22
Main register mapping .................................. 84
22.1
M_DEV_CFG ...................................................84
22.2
M_DEV_PROG_ID .......................................... 84
22.3
M_GEN_FLAG .................................................85
22.4
M_STATUS ...................................................... 86
22.5
M_SYS_CFG ................................................... 88
22.6
M_SYS1_CFG ................................................. 89
22.7
M_REG_CTRL .................................................91
22.8
M_REG2_CTRL ...............................................92
22.9
M_REG_FLG ................................................... 93
22.10
M_REG_MSK .................................................. 95
22.11
M_REG1_FLG ................................................. 96
22.12
M_REG1_MSK ................................................ 97
22.13
M_IO_CTRL .....................................................97
22.14
M_IO_TIMER_FLG .......................................... 98
22.15
M_IO_TIMER_MSK ......................................... 99
22.16
M_VSUP_COM_FLG .....................................100
22.17
M_VSUP_COM_MSK .................................... 101
22.18
M_IOWU_CFG ...............................................102
22.19
M_IOWU_EN ................................................. 103
22.20
M_IOWU_FLG ............................................... 104
22.21
M_WU1_EN ...................................................104
22.22
M_WU1_FLG ................................................. 105
22.23
M_AMUX_CTRL ............................................ 106
22.24
M_LDT_CFG1 ................................................107
22.25
M_LDT_CFG2 ................................................108
22.26
M_LDT_CFG3 ................................................108
22.27
M_LDT_CTRL ................................................108
22.28
M_CAN .......................................................... 109
22.29
M_CAN_MSK .................................................111
22.30
M_MEMORY0 ................................................111
22.31
M_MEMORY1 ................................................112
22.32
M_HW_ID ...................................................... 112
23
Fail-safe register mapping ..........................115
23.1
FS_I_OVUV_CFG1 ........................................115
23.2
FS_I_OVUV_CFG2 ........................................115
23.3
FS_I_ERRMON_LIMP0_CFG ........................117
23.4
FS_I_FSSM_CFG ..........................................117
23.5
FS_I_WD_CFG ..............................................119
23.6
FS_WDW_CFG ............................................. 121
23.7
FS_WD_TOKEN ............................................ 122
23.8
FS_WD_ANSWER .........................................122
23.9
FS_LIMP0_REL ............................................. 123
23.10
FS_ABIST ......................................................123
23.11
FS_SAFETY_OUTPUTS ............................... 124
23.12
FS_SAFETY_FLG ......................................... 126
23.13
FS_CRC .........................................................127
24
OTP bits description ................................... 128
24.1
Main OTP overview ....................................... 128
24.2
Main OTP bits description ............................. 128
24.3
Fail-safe OTP overview ................................. 133
24.4
Fail-safe OTP bits description ....................... 134
25
Package outline ........................................... 139
26
Revision history ...........................................144
Legal information .........................................145
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section 'Legal information'.
© 2024 NXP B.V.
All rights reserved.
For more information, please visit: https://www.nxp.com
Document feedback
Date of release: 23 October 2024
Document identifier: FS2400



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