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MFS2401AVBA0ES Datasheet(PDF) 127 Page - NXP Semiconductors |
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MFS2401AVBA0ES Datasheet(HTML) 127 Page - NXP Semiconductors |
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127 / 151 page ![]() NXP Semiconductors FS2400 Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver Bit Symbol Description Report that the ERRMON timer was not acknowledged by user 0 No error/error acknowledged by user on time 1 ERRMON timer expired with no acknowledgement by user 13 ERRMON_TMR_EXP_I POR, or clear on write (write '1') Table 145. FS_SAFETY_FLG register bit description...continued 23.13 FS_CRC Bit 15 14 13 12 11 10 9 8 Write 0 0 INIT_CRC_ NOK_M INIT_CRC_ NOK_I 0 0 INIT_CRC_ LIMP0_IMPACT 0 Read 0 0 INIT_CRC_ NOK_M INIT_CRC_ NOK_I 0 0 INIT_CRC_ LIMP0_IMPACT 0 Reset 0 0 0 0 0 0 0 0 Bit 7 6 5 4 3 2 1 0 Write CRC_VALUE Read CRC_VALUE Reset 0 0 0 0 0 0 0 0 Table 146. FS_CRC register bit allocation Bit Symbol Description INIT registers CRC value calculated by the MCU (CRC check every 5 ms in Normal mode only) CRC_VALUE[7:0] 0 to 7 CRC_VALUE POR Configure CRC impact on LIMP0 0 No effect 1 LIMP0 assertion 9 INIT_CRC_LIMP0_IMPACT POR Report an INIT register CRC error 0 No error detected 1 INIT registers CRC error detected 12 INIT_CRC_NOK_I POR Mask CRC not OK interrupt 0 Interrupt is not inhibited 1 Interrupt is inhibited 13 INIT_CRC_NOK_M POR Table 147. FS_CRC register bit description FS2400 All information provided in this document is subject to legal disclaimers. © 2024 NXP B.V. All rights reserved. Product data sheet Rev. 4 — 23 October 2024 Document feedback 127 / 151 |
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