AS4C64M32MD2-25BCN datasheet(93/129 Pages) ALSC

Part #	AS4C64M32MD2-25BCN

Description	Deep Power Down Mode

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Manufacturer	ALSC [Alliance Semiconductor Corporation]

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8.6 Output buffer characteristics

8.6.1

HSUL_12 Driver Output Timing Reference Load

These ‘Timing Reference Loads’ are not intended as a precise representation of any particular system environment or

a depiction of the actual load presented by a production tester. System designers should use IBIS or other simulation

tools to correlate the timing reference load to a system environment. Manufacturers correlate to their production test

conditions, generally one or more coaxial transmission lines terminated at the tester electronics.

LPDDR2

VREF

Output

0.5 X VDDQ

50Ω

VTT = 0.5 X VDDQ

CLOAD = 5pF

Figure 8.4 — HSUL_12 Driver Output Reference Load for Timing and Slew Rate

NOTE 1: All output timing parameter values (like tDQSCK, tDQSQ, tQHS, tHZ, tRPRE etc.) are reported with respect to this reference load. This

reference load is also used to report slew rate.

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AS4C64M32MD2-25BCN Datasheet(PDF) 93 Page - Alliance Semiconductor Corporation