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AS4C64M32MD2-25BCN Datasheet(PDF) 21 Page - Alliance Semiconductor Corporation |
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AS4C64M32MD2-25BCN Datasheet(HTML) 21 Page - Alliance Semiconductor Corporation |
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21 / 129 page  MR7 Basic Configuration 3 (MA <7:0> =07H) : OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0 Revision ID2 Revision ID2 Read- only OP<7:0> 0000 0000B: A-version NOTE 1 MR7 is Vendor Specific MR8_Basic Configuration 4 (MA<7:0> = 08BH): OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0 I/O width Density Type Type Read- only OP<1:0> 00B: S4 SDRAM 01B: Reserved 10B: Do Not Use 11B: Reserved Density Read- only OP<5:2> 0000B: 64Mb 0001B: 128Mb 0010B: 256Mb 0011B: 512Mb 0100B: 1Gb 0101B: 2Gb 0110B: 4Gb 0111B 8Gb 1000B: 16Gb 1001B: 32Gb All others : reserved I/O Width Read- only OP<7:6> 00B: x32 01B: x16 10B: x8 11B: not used MR9_Test Mode (MA<7:0> = 09H): OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0 Vendor-specific Test Mode MR10_Calibration (MA<7:0> = 0AH): OP7 OP6 OP5 OP4 OP3 OP2 OP1 OP0 Calibration Code Calibration Code Write- only OP<7:0> 0xFFB: Calibration command after initialization 0xABB: Long calibration 0x56B: Short calibration 0xC3B: ZQ Reset Others : Reserved NOTE 1 Host processor shall not write MR10 with “Reserved” values NOTE 2 LPDDR2 devices shall ignore calibration command when a “Reserved” value is written into MR10. NOTE 3 See AC timing table for the calibration latency. NOTE 4 If ZQ is connected to VSSCA through RZQ, either the ZQ calibration function (see “Mode Register Write ZQ Calibration Command” ) or default calibration (through the ZQreset command) is supported. If ZQ is connected to VDD2, the device operates with default calibration, and ZQ calibration commands are ignored. In both cases, the ZQ connection shall not change after power is applied to the device. AS4C64M32MD2-25BCN AS4C128M16MD2-25BCN Confidential - 21/129 - Rev.1.0 July 2016 |
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