AS4C64M32MD2-25BCN datasheet(24/129 Pages) ALSC

24 / 129 page

4. LPDDR2 Command Definitions and Timing Diagrams

4.1 Active Command

4.1.1

LPDDR2-SX: Activate Command

The SDRAM Activate command is issued by holding CS# LOW, CA0 LOW, and CA1 HIGH at the rising edge of the

clock. The bank addresses BA0 - BA2 are used to select the desired bank. The row address R0 through R14 is used

to determine which row to activate in the selected bank. The Activate command must be applied before any Read or

Write operation can be executed. The LPDDR2 SDRAM can accept a read or write command at time tRCD after the

activate command is sent. Once a bank has been activated it must be precharged before another Activate command

can be applied to the same bank. The bank active and precharge times are defined as tRAS and tRP, respectively.

The minimum time interval between successive Activate commands to the same bank is determined by the RAS cycle

time of the device (tRC). The minimum time interval between Activate commands to different banks is tRRD.

Certain restrictions on operation of the 8-bank devices must be observed. There are two rules. One for restricting the

number of sequential Activate commands that can be issued and another for allowing more time for RAS precharge for

a Precharge All command. The rules are as follows:

• 8-bank device Sequential Bank Activation Restriction : No more than 4 banks may be activated (or refreshed, in the

case of REFpb) in a rolling tFAW window. Converting to clocks is done by dividing tFAW[ns] by tCK[ns], and rounding

up to next integer value. As an example of the rolling window, if RU{ (tFAW / tCK) } is 10 clocks, and an activate

command is issued in clock N, no more than three further activate commands may be issued at or between clock N+1

and N+9. REFpb also counts as bank-activation for the purposes of tFAW.

• 8-bank device Precharge All Allowance : tRP for a Precharge All command for an 8-bank device shall equal tRPab,

which is greater than tRPpb.

Figure 4.1 — LPDDR2-SX: Activate command cycle: tRCD = 3, tRP = 3, tRRD = 2

NOTE 1 A Precharge-All command uses tRPab timing, while a Single Bank Precharge command uses tRPpb timing. In this figure,

tRP is used to denote either an All-bank

Precharge or a Single Bank Precharge.

Figure 4.2 — LPDDR2-SX: tFAW timing

NOTE 1: For 8-bank devices only.

AS4C64M32MD2-25BCN

AS4C128M16MD2-25BCN

Confidential

- 24/129 -

Rev.1.0 July 2016

AS4C64M32MD2-25BCN Datasheet(PDF) 24 Page - Alliance Semiconductor Corporation