AS4C64M32MD2-25BCN datasheet(38/129 Pages) ALSC

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4.8 LPDDR2-SX: Precharge operation

The Precharge command is used to precharge or close a bank that has been activated. The Precharge command is

initiated by having CS# LOW, CA0 HIGH, CA1 HIGH, CA2 LOW, and CA3 HIGH at the rising edge of the clock. The

Precharge Command can be used to precharge each bank independently or all banks simultaneously. For 4-bank

devices, the AB flag, and the bank address bits, BA0 and BA1, are used to determine which bank(s) to precharge. For

8-bank devices, the AB flag, and the bank address bits, BA0, BA1, and BA2, are used to determine which bank(s) to

precharge. The bank(s) will be available for a subsequent row access tRPab after an All-Bank Precharge command is

issued and tRPpb after a Single-Bank Precharge command is issued.

In order to ensure that 8-bank devices do not exceed the instantaneous current supplying capability of 4-bank devices,

the Row Precharge time (tRP) for an All-Bank Precharge for 8-bank devices (tRPab) will be longer than the Row

Precharge time for a Single-Bank Precharge (tRPpb). For 4-bank devices, the Row Precharge time (tRP) for an All-

Bank Precharge (tRPab) is equal to the Row Precharge time for a Single-Bank Precharge (tRPpb).

Figure 4-1 shows Activate to Precharge timing.

Table 8 – Bank selection for Precharge by address bits

AB (CA4r)

BA2 (CA9r)

BA1 (CA8r)

BA0 (CA7r)

Precharged Bank(s)

4-bank device

8-bank device

Bank 0 only

Bank 1 only

Bank 2 only

Bank 3 only

Bank 0 only

Bank 4 only

Bank 1 only

Bank 5 only

Bank 2 only

Bank 6 only

Bank 3 only

Bank 7 only

Don't care

All Banks

4.8.1

LPDDR2-SX: Burst Read operation followed by Precharge

For the earliest possible precharge, the precharge command may be issued BL/2 clock cycles after a Read command.

For an untruncated burst, BL is the value from the Mode Register. For a truncated burst, BL is the effective burst

length. A new bank active (command) may be issued to the same bank after the Row Precharge time (tRP). A

precharge command cannot be issued until after tRAS is satisfied.

For LPDDR2-S4 devices, the minimum Read to Precharge spacing has also to satisfy a minimum analog time from the

rising clock edge that initiates the last 4-bit prefetch of a Read command. This time is called tRTP (Read to Precharge).

For LPDDR2-S4 devices, tRTP begins BL/2 - 2 clock cycles after the Read command. If the burst is truncated by a

BST command or a Read command to a different bank, the effective “BL” shall be used to calculate when tRTP begins.

See Table 9 for Read to Precharge timings for LPDDR2-S4

AS4C64M32MD2-25BCN

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