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AS4C64M32MD2-25BCN Datasheet(PDF) 84 Page - Alliance Semiconductor Corporation |
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AS4C64M32MD2-25BCN Datasheet(HTML) 84 Page - Alliance Semiconductor Corporation |
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84 / 129 page ![]() Table 28 — Single-ended levels for CK, DQS, CK#, DQS# Symbol Parameter LPDDR2-800 Unit Notes Min Max VSEH(AC) Single-ended high-level for strobes (VDDQ/2) +0.220 Note 3 V 1,2 Single-ended high-level for CK, CK# (VDDCA/2) +0.220 Note 3 V 1,2 VSEL(AC) Single-ended low-level for strobes Note 3 (VDDQ/2) - 0.220 V 1,2 Single-ended low-level for CK, CK# Note 3 (VDDCA/2) - 0.220 V 1,2 NOTE 1 For CK, CK# use VSEH/VSEL(AC) of CA; for strobes (DQS0, DQS0#, DQS1, DQS1#, DQS2, DQS2#, DQS3, DQS3#) use VIH/VIL(AC) of DQs. NOTE 2 VIH(AC)/VIL(AC) for DQs is based on VREFDQ; VSEH(AC)/VSEL(AC) for CA is based on VREFCA; if a reduced ac-high or ac- low level is used for a signal group, then the reduced level applies also here NOTE 3 These values are not defined, however the single-ended signals CK, CK#, DQS0, DQS0#, DQS1, DQS1#, DQS2, DQS2#, DQS3, DQS3# need to be within the respective limits (VIH(DC) max, VIL(DC)min) for single-ended signals as well as the limitations for overshoot and undershoot. Refer to Overshoot and Undershoot Specifications” AS4C64M32MD2-25BCN AS4C128M16MD2-25BCN Confidential - 84/129 - Rev.1.0 July 2016 |
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