AS4C64M32MD2-25BCN datasheet(71/129 Pages) ALSC

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4.18

LPDDR2-SDRAM Truth Tables

The truth tables provide complementary information to the state diagram, they clarify the device behavior and the

applied restrictions when considering the actual state of all the Banks.

Table 15 – LPDDR2-S4 : CKE Table

Device Current

State

CKEn-1

CKEn

CS#

Command n

Operation n

Device Next State

Notes

Active Power

Down

Maintain active Power

Down

Active Power Down

NOP

Exit Active Power

Down

Active

6,9

Idle Power Down

Maintain Idle Power

Down

Idle Power Down

NOP

Exit Idle Power Down

Idle

6,9

Resetting Power

Down

Maintain Resetting

Power Down

Resetting Power

Down

NOP

Exit Resetting Power

Down

Idle or Resetting

6,9,12

Deep Power

Down

Maintain Deep Power

Down

Deep Power Down

NOP

Exit Deep Power

Down

Power On

Self Refresh

Maintain Self Refresh

Self Refresh

NOP

Exit Self Refresh

Idle

7,10

Bank(s) Active

NOP

Enter Active Power

Down

Active Power Down

All Banks Idle

NOP

Enter Idle Power

Down

Idle Power Down

Enter Self-

refresh

Enter Self Refresh

Self Refresh

Deep power

down

Enter Deep Power

Down

Deep Power Down

Resetting

NOP

Enter Resetting Power

Down

Resetting Power

Down

Refer to the Command Truth Table

NOTE 1 “CKEn” is the logic state of CKE at clock rising edge n; “CKEn-1” was the state of CKE at the previous clock edge.

NOTE 2 “CS#” is the logic state of CS# at the clock rising edge n;

NOTE 3 “Current state” is the state of the LPDDR2 device immediately prior to clock edge n.

NOTE 4 “Command n” is the command registered at clock edge N, and “Operation n” is a result of “Command n”.

NOTE 5 All states and sequences not shown are illegal or reserved unless explicitly described elsewhere in this document.

NOTE 6 Power Down exit time (tXP) should elapse before a command other than NOP is issued.

NOTE 7 Self-Refresh exit time (tXSR) should elapse before a command other than NOP is issued.

NOTE 8 The Deep Power-Down exit procedure must be followed as discussed in the Deep Power-Down section of the Functional Description.

NOTE 9 The clock must toggle at least twice during the tXP period.

NOTE 10 The clock must toggle at least twice during the tXSR time.

NOTE 11 'X’ means ‘Don’t care’.

NOTE 12 Upon exiting Resetting Power Down, the device will return to the Idle state if tINIT5 has expired

Table 16 — Current State Bank n - Command to Bank n

Current State

Command

Operation

Next State

Notes

Any

NOP

Continue previous operation

Current State

Idle

Active

Select and activate row

Active

Refresh(Per

Bank)

Begin to refresh

Refreshing (Per Bank)

Refresh(All Bank)

Begin to refresh

Refreshing (All Bank)

MRW

Load value to Mode Register

MR Writing

MRR

Read Value from Mode Register

Idle

MR Reading

Reset

Begin Device Auto-Initialization

Resetting

7,8

Precharge

Deactivate row in bank or banks

Precharging

9,15

Row Active

Read

Select Column, and start read burst

Reading

Write

Select Column, and start write burst

Writing

MRR

Read Value from Mode Register

Active

MR Reading

Precharge

Deactivate row in bank or banks

Precharging

AS4C64M32MD2-25BCN

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AS4C64M32MD2-25BCN Datasheet(PDF) 71 Page - Alliance Semiconductor Corporation

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