AS4C64M32MD2-25BCN datasheet(60/129 Pages) ALSC

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AS4C64M32MD2-25BCN Datasheet(PDF) 60 Page - Alliance Semiconductor Corporation

Part #	AS4C64M32MD2-25BCN

Description	Deep Power Down Mode

PDF	129 Pages

Scroll/Zoom	100%

Manufacturer	ALSC [Alliance Semiconductor Corporation]

Direct Link	https://www.alliancememory.com

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60 / 129 page

Figure 4.46 — REF to REF timing with CKE intensive environment for LPDDR2 SDRAM

NOTE 1 The pattern shown above can repeat over a long period of time. With this pattern, LPDDR2 SDRAM guarantees all AC

and DC timing & voltage specifications with temperature and voltage drift

Figure 4.47 — Read to power-down entry

NOTE 1 CKE may be registered LOW RL + RU(tDQSCK(MAX)/tCK) + BL/2 + 1 clock cycles after the clock on which the Read command is

registered.

NOTE 2

CKE must be held HIGH until the end of the burst operation.

AS4C64M32MD2-25BCN

AS4C128M16MD2-25BCN

Confidential

- 60/129 -

Rev.1.0 July 2016

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