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AS4C64M32MD2-25BCN Datasheet(PDF) 68 Page - Alliance Semiconductor Corporation

Part # AS4C64M32MD2-25BCN
Description  Deep Power Down Mode
PDF  129 Pages
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C64M32MD2-25BCN Datasheet(HTML) 68 Page - Alliance Semiconductor Corporation

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4.16
No Operation command
The purpose of the No Operation command (NOP) is to prevent the LPDDR2 device from registering any unwanted
command between operations. Only when the CKE level is constant for clock cycle N-1 and clock cycle N, a NOP
command may be issued at clock cycle N. A NOP command has two possible encodings:
1. CS# HIGH at the clock rising edge N.
2. CS# LOW and CA0, CA1, CA2 HIGH at the clock rising edge N.
The No Operation command will not terminate a previous operation that is still executing, such as a burst read or write
cycle.
AS4C64M32MD2-25BCN
AS4C128M16MD2-25BCN
Confidential
- 68/129 -
Rev.1.0 July 2016



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