AS4C64M32MD2-25BCN datasheet(82/129 Pages) ALSC

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7.4 AC and DC Logic Input Levels for Differential Signals

7.4.1

Differential signal definition

Figure 7.4 — Definition of differential ac-swing and “time above ac-level” tDVAC

7.4.2

Differential swing requirements for clock (CK - CK#) and strobe (DQS - DQS#)

Table 26 — Differential AC and DC Input Levels

Symbol

Parameter

LPDDR2-1066 to LPDDR2-466

LPDDR2-400 to LPDDR2-200

Unit

Notes

Min

Max

Min

Max

VIHdiff(DC)

Differential input high

2 x (VIH(DC)-

Vref)

Note 3

2 x (VIH(DC)-

Vref)

Note 3

VILdiff(DC)

Differential input low

Note 3

2 x (VIL(DC)-

Vref)

Note 3

2 x (VIL(DC)-

Vref)

VIHdiff(AC)

Differential input high ac

2 x (VIH(AC)-

Vref)

Note 3

2 x (VIH(AC)-

Vref)

Note 3

VILdiff(AC)

Differential input low ac

Note 3

2 x (VIL(AC)-

Vref)

Note 3

2 x (VIL(AC)-

Vref)

NOTE 1 Used to define a differential signal slew-rate. For CK - CK# use VIH/VIL(dc) of CA and VREFCA ; for DQS - DQS#, use

VIH/VIL(dc) of DQs and VREFDQ; if a reduced dc-high or dc-low level is used for a signal group, then the reduced level applies

also here.

NOTE 2 For CK - CK# use VIH/VIL(ac) of CA and VREFCA; for DQS - DQS#, use VIH/VIL(ac) of DQs and VREFDQ; if a reduced

ac-high or ac-low level is used for a signal group, then the reduced level applies also here

NOTE 3 These values are not defined, however the single-ended signals CK, CK#, DQS, and DQS# need to be within the

respective limits (VIH(dc) max, VIL(dc)min) for single-ended signals as well as the limitations for overshoot and undershoot. Refer

to Overshoot and Undershoot Specifications”

NOTE 4 For CK and CK#, Vref = VrefCA(DC). For DQS and DQS#, Vref = VrefDQ(DC).

AS4C64M32MD2-25BCN

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