AS4C64M32MD2-25BCN datasheet(44/129 Pages) ALSC

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Table 10 – Command Scheduling Separations related to Refresh

Symbol

Minimum delay from

Notes

tRFCab

REFab

Activate cmd to any bank

REFpb

tRFCpb

REFpb

REFab

Activate cmd to same bank as REFpb

REFpb

tRRD

REFpb

Activate cmd to different bank than REFpb

Activate

REfFpb affecting an idle bank (different bank than Activate)

Activate cmd to different bank than prior Activate

NOTE 1 A bank must be in the Idle state before it is refreshed. Therefore, after Activate, REFab is now allowed and REFpb is allowed only if it

affects a bank which is in the Idle state.

4.9.1

LPDDR2 SDRAM Refresh Requirements

(1) Minimum number of Refresh commands:

The LPDDR2 SDRAM requires a minimum number of R Refresh (REFab) commands within any rolling Refresh

Window (tREFW = 32 ms @ MR4[2:0] = “011” or Tcase 　 85 °C). See Table 50 for actual numbers per density. The

resulting average refresh interval (tREFI) is given in Table 50.

See Mode Register 4 for tREFW and tREFI refresh multipliers at different MR4 settings.

For LPDDR2-SDRAM devices supporting Per-Bank-Refresh, a REFab command may be replaced by a full cycle of

eight REFpb commands.

(2) Burst Refresh limitation:

To limit maximum current consumption, a maximum of 8 REFab commands may be issued in any rolling tREFBW

(tREFBW = 4 x 8 x tRFCab). This condition does not apply if REFpb commands are used.

(3) Refresh Requirements and Self-Refresh:

If any time within a refresh window is spent in Self-Refresh Mode, the number of required Refresh commands in this

particular window is reduced to:

R* = R - RU{tSRF / tREFI} = R - RU{R * tSRF / tREFW}; where RU stands for the round-up function.

Figure 4.26 — LPDDR2-SX: Definition of tSRF

Several examples on how to tSRF is calculated:

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