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MFS2401AVBA0ES Datasheet(PDF) 103 Page - NXP Semiconductors

Part # MFS2401AVBA0ES
Description  Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
PDF  151 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MFS2401AVBA0ES Datasheet(HTML) 103 Page - NXP Semiconductors

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NXP Semiconductors
FS2400
Fail-safe system basis chip with SMPS and LDO, CAN FD transceiver
Bit
Symbol
Description
Configure WAKE2 deglitcher time
0 WAKE2 deglitcher = 15 us
1 WAKE2 deglitcher = 65 us
9
WK2_DGLT
POR, Write
Configure WAKE3 deglitcher time
0 WAKE3 deglitcher = 15 us
1 WAKE3 deglitcher = 65 us
10
WK3_DGLT
POR, write
Configure HVIO1 deglitcher time
0 HVIO1 deglitcher = 15 us
1 HVIO1 deglitcher = 65 us
11
HVIO1_DGLT
POR, write
Table 93. M_IOWU_CFG register bit description...continued
22.19 M_IOWU_EN
Bit
15
14
13
12
11
10
9
8
Write
0
0
0
0
0
0
0
0
Read
0
0
0
0
0
0
0
0
Reset
0
0
0
0
0
0
0
0
Bit
7
6
5
4
3
2
1
0
Write
HVIO1_WUEN
WK3_WUEN
WK2_WUEN
0
0
Read
HVIO1_WUEN
WK3_WUEN
WK2_WUEN
0
0
Reset
0
1
0
1
0
1
0
0
Table 94. M_IOWU_EN register bit allocation
Bit
Symbol
Description
Configure WAKE2 wake-up and interrupt capability
00 No wake-up and no interrupt
01 Wake-up only
10 Interrupt only
11 Wake-up and interrupt
2 to 3
WK2_WUEN
POR or Fail-safe state
Configure WAKE3 wake-up and interrupt capability
00 No wake-up and no interrupt
01 Wake-up only
10 Interrupt only
11 Wake-up and interrupt
4 to 5
WK3_WUEN
POR or Fail-safe state
Table 95. M_IOWU_EN register bit description
FS2400
All information provided in this document is subject to legal disclaimers.
© 2024 NXP B.V. All rights reserved.
Product data sheet
Rev. 4 — 23 October 2024
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