MPF5024AMBA0ES datasheet(14/93 Pages) NXP

14 / 93 page

NXP Semiconductors

PF5024

Power management integrated circuit (PMIC) for high performance applications

PF5024

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Product data sheet

Rev. 1 — 15 April 2020

14 / 93

other miscellaneous functions can be written to or read from the functional I2C register

map during the system On state.

13.1.6.1 Run state

If the power up state is successfully completed, the state machine transitions to the run

state. In this state, RESETBMCU is released high, and the MCU is expected to boot up

and set up specific registers on the PMIC as required during the system boot up process.

The Run mode is intended to be used as the normal mode of operation for the system.

Each regulator has specific registers to control its output voltage, operation mode and/or

enable/disable state during the run state.

By default, the VSWx_RUN[7:0] register is loaded with the data stored in the

OTP_VSWx[7:0] bit.

Upon power up, if the switching regulator is part of the power up sequence, the

SWx_RUN_MODE[1:0] bits will be loaded as needed by the system:

• When OTP_SYNC_MODE = 1, default SWx_RUN_MODE at power up is always set to

PWM (0b01)

• When OTP_SYNC_MODE = 0 and OTP_SYNCOUT_EN = 1, default

SWx_RUN_MODE at power up is always set to PWM (0b01)

• When OTP_FSS_EN = 1, default SWx_RUN_MODE at power up shall always set to

PWM (0b01)

• If none of the above conditions are met, the default value of the SWx_RUN_MODE bits

at power up will be set by the OTP_SW_MODE bits.

When OTP_SW_MODE = 0, the default value of the SWx_RUN_MODE bits are set to

0b11 (autoskip).

When OTP_SW_MODE = 1, the default value of the SWx_RUN_MODE bits are set to

0b01 (PWM).

If the switching regulator is not part of the power up sequence, the

SWx_RUN_MODE[1:0] bits are loaded with 0b00 (Off mode).

In a typical system, each time the processor boots up (PMIC transitions from Off mode

to run state), all output voltage configurations are reset to the default OTP configuration,

and the MCU should configure the PMIC to its desired usage in the application.

13.1.6.2 Standby state

The standby state is intended to be used as a low power (state retention) mode of

operation. In this state, the voltage regulators can be preset to a specific low power

configuration in order to reduce the power consumption during system’s sleep or state

retention modes of operations.

The standby state is entered when the STANDBY pin is pulled high or low as defined

by the STANBYINV bit. The STANDBY pin is pulled high/low by the MCU to enter/exit

system low power mode. See Section 14.9.2 "STANDBY" for detailed configuration of the

STANDBY pin.

Each regulator has specific registers to control its output voltage, operation mode and/or

enable/disable state during the standby state.

MPF5024AMBA0ES Datasheet(PDF) 14 Page - NXP Semiconductors

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