MPF5024AMBA0ES datasheet(59/93 Pages) NXP

59 / 93 page

NXP Semiconductors

PF5024

Power management integrated circuit (PMIC) for high performance applications

PF5024

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Product data sheet

Rev. 1 — 15 April 2020

59 / 93

Table 51. Manual frequency tuning configuration

CLK_FREQ[3:0]

High speed clock frequency

(MHz)

Switching regulators frequency

(MHz)

0000

2.500

0001

2.625

0010

2.750

0011

2.875

0100

3.000

0101

Not used

0110

Not used

0111

Not used

1000

Not used

1001

2.000

1010

2.125

1011

2.250

1100

2.375

1101

Not used

1110

Not used

1111

Not used

The default switching frequency is set by the OTP_CLK_FREQ[3:0] bits.

Manual tuning cannot be applied when frequency spread-spectrum or external

clock synchronization is used. However, during external clock synchronization, it is

recommended to program the CLK_FREQ[3:0] bits to match the external frequency as

close as possible.

15.4.4 Spread-spectrum

The internal clock provides a programmable frequency spread spectrum with two ranges

for narrow spread and wide spread to help manage EMC in the automotive applications.

• When the FSS_EN = 1, the frequency spread-spectrum is enabled.

• When the FSS_EN = 0, the frequency spread-spectrum is disabled.

The default state of the FSS_EN bit upon a power up can be configured via the

OTP_FSS_EN bit.

The FSS_RANGE bit is provided to select the clock frequency range.

• When FSS_RANGE = 0, the maximum clock frequency range is ±5 %.

• When FSS_RANGE = 1, the maximum clock frequency range is ±10 %.

The default value of the FSS_RANGE bit upon a power up can be configured via the

OTP_FSS_RANGE bit.

The frequency spread-spectrum is performed at a 24 kHz modulation frequency when

the internal high frequency clock is used to generate the switching frequency for the

switching regulators. When the external clock synchronization is enabled, the spread-

spectrum is disabled.

Figure 26 shows implementation of spread-spectrum for two settings.

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