MPF5024AMBA0ES datasheet(38/93 Pages) NXP

38 / 93 page

NXP Semiconductors

PF5024

Power management integrated circuit (PMIC) for high performance applications

PF5024

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Product data sheet

Rev. 1 — 15 April 2020

38 / 93

Table 28. PWRON debounce configuration in edge detection mode

Bits

Value

Falling edge debounce

(ms)

Rising edge debounce

(ms)

PWRON_DBNC[1:0]

125

PWRON_DBNC[1:0]

750

The default value for the power on debounce is set by the OTP_PWRON_DBNC[1:0]

bits.

Pressing the PWRON switch for longer than the debounce time starts a power on

event as well as generate interrupts which the processor may use to initiate PMIC state

transitions.

During the system On state, when the PWRON button is pushed (logic 0) for longer than

the debounce setting, the PWRON_PUSH_I interrupt is generated. When the PWRON

button is released (logic 1) for longer than the debounce setting, the PWRON_REL_I

interrupt is generated.

The PWRON_1S_I, PWRON_2S_I, PWRON_3S_I, PWRON_4S_I and PWRON_8S_I

interrupts are generated when the PWRON pin is held low for longer than 1, 2, 3, 4 and 8

seconds respectively.

If PWRON_RST_EN = 1, pressing the PWRON for longer than the delay programmed by

TRESET[1:0] forces a PMIC reset. A PMIC reset initiates a power down sequence, wait

for 30 µs to allow all supplies to discharge and then it powers back up with the default

OTP configuration.

If PWRON_RST_EN = 0, the device starts a turn off event after push button is pressed

for longer than TRESET[1:0].

Table 29. TRESET configuration

TRESET[1:0]

Time to reset

2 s

4 s

8 s

16 s

The default value of the TRESET delay is programmable through the OTP_TRESET[1:0]

bits.

14.9.2 STANDBY

STANDBY is an input signal to the IC, when this pin is asserted, the device enters the

standby mode and when de-asserted, the part exits Standby mode.

STANDBY can be configured as active high or active low using the STANDBYINV bit.

Table 30. Standby pin polarity control

STANDBY (pin)

STANDBYINV (I2C bit)

STANDBY control

Not in Standby mode

In Standby mode

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