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MPF5024AMBA0ES Datasheet(PDF) 10 Page - NXP Semiconductors |
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MPF5024AMBA0ES Datasheet(HTML) 10 Page - NXP Semiconductors |
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10 / 93 page ![]() NXP Semiconductors PF5024 Power management integrated circuit (PMIC) for high performance applications PF5024 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 1 — 15 April 2020 10 / 93 Table 10. State machine transition definition Symbol Description Conditions 1. (STANDBY = 0 && STANDBYINV bit = 0) Transition A Standby to run 2. (STANDBY = 1 && STANDBYINV bit = 1) 1. (STANDBY = 1 && STANDBYINV bit = 0) Transition B Run to standby 2. (STANDBY = 0 && STANDBYINV bit = 1) Transition C System on to WD reset 1. Hard WD Reset event Transition D WD reset to system ON 1. 30 µs delay passed && WD_EVENT_CNT < WD_MAX_CNT Transition E WD reset to power down (fault) 1. WD_EVENT_CNT = WD_MAX_CNT Transitory off state: device pass through LP_Off to self-test to QPU_ Off (no power up event present) 1. LPM_OFF = 1 && TBBEN = Low Power up event from LP_Off state 2. LPM_OFF = 0 && TBBEN = Low && (PWRON = 1 && OTP_PWRON_MODE = 0) && UVDET< VIN < VIN_OVLO (or VIN_OVLO disabled) && Tj < TSD && TRIM_NOK = 0 && OTP_NOK = 0 Power up event from LP_Off state 3. LPM_OFF = 0 && TBBEN = Low && (PWRON H to L && OTP_PWRON_MODE = 1 && UVDET < VIN < VIN_OVLO (or VIN_OVLO disabled) && Tj < TSD && TRIM_NOK = 0 && OTP_NOK = 0 Transition J LP_Off to self-test (PF5024 ASIL B only) Conditions: Transitory OFF state to go into TBB mode. Device pass through LP_Off to self-test to QPU_Off (no power up event present) 4. TBBEN = high (V1P5D) 1. Pass self-tests Transition K Self-test to QPU_Off (PF5024 ASIL B only) 2. TBBEN = high (V1P5D) Transitory OFF state: device pass through LP_Off to QPU_Off (no power up event present) 1. LPM_OFF = 1 && TBBEN = Low Power up event from LP_Off state 2. LPM_OFF = 0 && TBBEN = Low && (PWRON = 1 && OTP_PWRON_MODE = 0) && UVDET< VIN < VIN_OVLO (or VIN_OVLO disabled) && Tj < TSD && TRIM_NOK = 0 && OTP_NOK = 0 Power up event from LP_Off state 3. LPM_OFF =0 && TBBEN = Low && (PWRON H to L && OTP_PWRON_MODE = 1) && UVDET < VIN < VIN_OVLO (or VIN_OVLO disabled) && Tj < TSD&& TRIM_NOK = 0 && OTP_NOK = 0 Transition F LP_Off to QPU_Off (PF5024 QM only) Transitory OFF state: device pass through LP_Off to QPU_Off (no power up event present) 4. TBBEN = High (V1P5D) |
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