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MPF5024AMBA0ES Datasheet(PDF) 65 Page - NXP Semiconductors

Part # MPF5024AMBA0ES
Description  Power management integrated circuit (PMIC) for high performance applications
PDF  93 Pages
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

MPF5024AMBA0ES Datasheet(HTML) 65 Page - NXP Semiconductors

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NXP Semiconductors
PF5024
Power management integrated circuit (PMIC) for high performance applications
PF5024
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2020. All rights reserved.
Product data sheet
Rev. 1 — 15 April 2020
65 / 93
The WD timer is reset when device goes into any of the Off modes and does not start
counting until RESETBMCU is deasserted in the next power up sequence.
The OTP_WD_DURATION[3:0] selects the initial configuration for the watchdog window
duration between 1.0 ms and 32768 ms (typical values).
The watchdog window duration can change during the system On state by modifying the
WD_DURATION[3:0] bits in the functional register map. If the WD_DURATION[3:0] bits
get changed during the system On state, the WD timer is reset.
Table 56. Watchdog duration register
WD_DURATION[3:0]
Watchdog timer duration (ms)
0000
1
0001
2
0010
4
0011
8
0100
16
0101
32
0110
64
0111
128
1000
256
1001
512
1010
1024
1011
2048
1100
4096
1101
8192
1110
16384
1111
32768
The WD_EXPIRE_CNT[2:0] counter is used to ensure no cyclic watchdog condition
occurs. When the WD_CLEAR flag is cleared successfully before the WD timer
expires, the WD_EXPIRE_CNT[2:0] is decreased by 1. Every time the WD
timer is not successfully refreshed, it gets reset and starts a new count and the
WD_EXPIRE_CNT[2:0] is increased by 2.
If WD_EXPIRE_CNT[2:0] = WD_MAX_EXPIRE[2:0], a WD event is initiated. The default
maximum amount of time the watchdog can expire before starting a WD reset, is set
by the OTP_WD_MAX_EXPIRE[2:0]. Writing a value less than or equal to 0x02 on the
OTP_WD_MAX_EXPIRE causes the watchdog event to be initiated, as soon as the WD
timer expires for the first time.
The OTP_WDWINDOW bit selects whether the watchdog is single ended or window
mode.
• When OTP_WDWINDOW = 0, the WD_CLEAR flag can be cleared within 100 % of the
watchdog timer.
• When OTP_WDWINDOW = 1, the WD_CLEAR flag can only be cleared within the
second half of the programmed watchdog timer. Clearing the WD_CLEAR flag within
the first half of the watchdog window is interpreted as a failure to refresh the watchdog.



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