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MPF5024AMBA0ES Datasheet(PDF) 62 Page - NXP Semiconductors |
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MPF5024AMBA0ES Datasheet(HTML) 62 Page - NXP Semiconductors |
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62 / 93 page ![]() NXP Semiconductors PF5024 Power management integrated circuit (PMIC) for high performance applications PF5024 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 1 — 15 April 2020 62 / 93 Symbol Parameter Min Typ Max Unit FSSRANGE Spread-spectrum range FSS_RANGE= 1 via CLK_FREQ[3:0] Spread-spectrum is done around center frequency of 20 MHz — ±10 — % FSSmod Spread spectrum frequency modulation — 24 — kHz Clock synchronization fSYNCIN SYNC input frequency range FSYNC_RANGE = 0 2000 — 3000 kHz fSYNCIN SYNC input frequency range FSYNC_RANGE = 1 333 — 500 kHz fSYNCOUT SYNC output frequency range via CLK_FREQ[3:0] 2000 — 3000 kHz VSYNCINLO Input frequency low voltage threshold — — 0.3*VDDIO V VSYNCINHI Input frequency high voltage threshold 0.7*VDDIO — — V RPD_SYNCIN SYNC internal pull down resistance 0.475 1.0 __ MΩ VSYNCOUTLO Output frequency low voltage threshold 0 — 0.4 V VSYNCOUTHI Output frequency high voltage threshold VDDIO − 0.5 — — V 15.5 Thermal monitoring The PF5024 features a temperature sensor at the center of the die which is used to generate the thermal interrupts and thermal shutdown. Figure 27 shows a high level block diagram of the thermal monitoring architecture in PF5024. aaa-029998 COMP Tsense TEMP_IC BG VTemp V155C V165C (TSD) V140C V125C V110C V95C V80C DIGITAL LOGIC STATE MACHINE (THERMAL INTERRUPT DECODING) AMUX Figure 27. Thermal monitoring architecture |
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