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MPF5024AMBA0ES Datasheet(PDF) 54 Page - NXP Semiconductors |
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MPF5024AMBA0ES Datasheet(HTML) 54 Page - NXP Semiconductors |
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54 / 93 page  NXP Semiconductors PF5024 Power management integrated circuit (PMIC) for high performance applications PF5024 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2020. All rights reserved. Product data sheet Rev. 1 — 15 April 2020 54 / 93 Symbol Parameter [1][2] Min Typ Max Unit DVSWx Output ripple in PWM mode at VSWxFB = 1.0 V — — 1.0 % IRCS DCM (skip mode) reverse current sense threshold Current flowing from PGND to SWxLX −200 — 200 mA ISWxQ Quiescent current PFM mode — 14 — µA ISWxQ Quiescent current Auto skip mode — 160 250 µA ISWxQ_DP Quiescent current in dual phase PWM mode — 200 320 µA ISWxQ_QP Quiescent current in quad phase PWM mode — 240 480 µA RONSWxHS SWx high-side P-MOSFET RDS(on) [3] — — 135 mΩ RONSWxLS SWx low-side N-MOSFET RDS(on) [3] — — 80 mΩ RSWxDIS Discharge resistance Regulator disabled and ramp down completed 50 100 200 Ω [1] For VSWx configurations greater than 1.35 V, full parametric operation is guaranteed for 2.7 V < SWxVIN < 5.5 V. Below 2.7 V, the SWx regulators are fully functional with degraded operation due to headroom limitation. [2] For VSWx = 1.8 V, output capacitance should be kept at or below the maximum recommended value. Likewise, it is recommended to use the slow turn on/off ramp rate to ensure the output is discharged completely when it is disabled. [3] Max RDS(on) does not include bondwire resistance. Consider +/- 50 % tolerance to account for bondwire and pin loss. Table 45. Recommended external components Symbol Parameter Min Typ Max Unit L Output inductor Maximum inductor DC resistance 50 mΩ Minimum saturation current at full load: 3.0 A [1] 0.47 1.0 1.5 µH Cout Output capacitor Use 2 × 22 µF, 6.3 V X7T ceramic capacitor to reduce output capacitance ESR 35 44 53 µF Cin Input capacitor 4.7 μF, 10 V X7R ceramic capacitor 4.23 4.7 5.17 µF [1] Keep inductor DCR as low as possible to improve regulator efficiency. 15.3 Voltage monitoring The PF5024 provides OV and UV monitoring capability for the following voltage regulators: • SW1, SW2, SW3, SW4 A programmable UV threshold is selected via the OTP_SWxUV_TH[1:0]. UV threshold selection represents a percentage of the nominal voltage programmed on each regulator. Table 46. UV threshold configuration register OTP_SWxUV_TH[1:0] UV threshold level 00 95 % 01 93 % 10 91 % 11 89 % A programmable OV threshold is selected via the OTP_SWxOV_TH[1:0]. OV threshold selection represents a percentage of the nominal voltage programmed on each regulator. |
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