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MM912F634CV2AP Datasheet(PDF) 32 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 32 Page - Freescale Semiconductor, Inc |
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32 / 335 page ![]() Electrical Characteristics Dynamic Electrical Characteristics MM912F634 Freescale Semiconductor 32 3.6.2.4.1 Master Mode Figure 12 depicts the timing diagram for master mode with transmission format CPHA = 0. Figure 12. SPI Master Timing (CPHA = 0) In Figure 13 depicts the timing diagram for master mode with transmission format CPHA=1. Figure 13. SPI Master Timing (CPHA = 1) SCK (Output) SCK (Output) MISO (Input) MOSI (Output) SS1 (Output) 1 9 5 6 MSB IN2 Bit MSB-1…1 LSB IN MSB OUT2 LSB OUT Bit MSB-1… 1 11 4 4 2 10 (CPOL = 0) (CPOL = 1) 3 13 13 1. If configured as an output. 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1, bit 2... MSB. 12 12 SCK (Output) SCK (Output) MISO (Input) MOSI (Output) 1 5 6 MSB IN2 Bit MSB-1… 1 LSB IN Master MSB OUT2 Master LSB OUT Bit MSB-1… 1 4 4 9 12 13 11 Port Data (CPOL = 0) (CPOL = 1) Port Data SS1 (Output) 2 12 13 3 1.If configured as output 2. LSBF = 0. For LSBF = 1, bit order is LSB, bit 1,bit 2... MSB. |
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