MM912F634CV2AP datasheet(87/335 Pages) FREESCALE

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Functional Description and Application Information

PWM Control Module (PWM8B2C)

MM912F634

Freescale Semiconductor

4.13

PWM Control Module (PWM8B2C)

4.13.1

Introduction

To control the High Side (HS1, HS2) and the Low Side (LS1, LS2) duty cycle as well as the PTB2 output, the PWM module is

implemented. Refer to the individual driver section for details on the use of the internal PWM1 and PWM0 signal (Section 4.11,

“High Side Drivers - HS", Section 4.12, “Low Side Drivers - LSx" and Section 4.17, “General Purpose I/O - PTB[0…2]")

The PWM definition is based on the HC12 PWM definitions with some of the simplifications incorporated. The PWM module has

two channels with independent controls of left and center aligned outputs on each channel.

Each of the two channels has a programmable period and duty cycle as well as a dedicated counter. A flexible clock select

scheme allows a total of four different clock sources to be used with the counters. Each of the modulators can create independent

continuous waveforms with software-selectable duty rates from 0% to 100%.

4.13.1.1

Features

The PWM block includes these distinctive features:

•

Two independent PWM channels with programmable periods and duty cycles

•

Dedicated counter for each PWM channel

•

Programmable PWM enable/disable for each channel

•

Software selection of PWM duty pulse polarity for each channel

•

Period and duty cycle are double buffered. Change takes effect when the end of the effective period is reached (PWM

counter reaches zero), or when the channel is disabled

•

Programmable center or left aligned outputs on individual channels

•

Four clock sources (A, B, SA, and SB) provide for a wide range of frequencies

•

Programmable clock select logic

4.13.1.2

Modes of Operation

The PWM8B2C module does operate in Normal mode only.

MM912F634CV2AP Datasheet(PDF) 87 Page - Freescale Semiconductor, Inc