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MM912F634CV2AP Datasheet(PDF) 78 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 78 Page - Freescale Semiconductor, Inc |
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78 / 335 page ![]() Functional Description and Application Information Window Watchdog MM912F634 Freescale Semiconductor 78 4.9.1 Register Definition 4.9.1.1 Watchdog Register (WDR) 4.9.1.2 Watchdog Service Register (WDSR) Table 91. Watchdog Register (WDR) Offset(71) 0x10 Access: User read/write 76 543 210 R WDOFF WDWO 0 00 WDTO W Reset 0 00 000 00 Note: 71. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space. Table 92. WDR - Register Field Descriptions Field Description 7 - WDOFF watchdog Off - Indicating the Watchdog module is being disabled externally. 6 - WDWO Watchdog Window Open - Indicating the Watchdog Window is currently open for counter reset. 2-0 WDTO[2:0] Watchdog Timeout Configuration - configuring the Watchdog timeout duration tWDTO. 000 - 10 ms 001 - 20 ms 010 - 40 ms 011 - 80 ms 100 - 160 ms 101 - 320 ms 110 - 640 ms 111 - 1280 ms Table 93. Watchdog Service Register (WDSR) Offset(72) 0x11 Access: User read/write 76 543 210 R WDSR W Reset 0 10 101 01 Note: 72. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space. Table 94. WDSR - Register Field Descriptions Field Description 7-0 WDSR Watchdog Service Register - Writing this register with the correct value (0xAA alternating 0x55) while the window is open will reset the watchdog counter. Writing the register while the watchdog is disabled will have no effect. |
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