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MM912F634CV2AP Datasheet(PDF) 35 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 35 Page - Freescale Semiconductor, Inc |
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35 / 335 page  Electrical Characteristics Dynamic Electrical Characteristics MM912F634 Freescale Semiconductor 35 Table 44 lists the timing characteristics for slave mode. Table 44. SPI Slave Mode Timing Characteristics Characteristic Symbol Min Typ Max Unit SCK frequency fSCK DC - 1 /4fBUS SCK period tSCK 4.0 - ∞ tBUS Enable lead time tLEAD 4.0 - - tBUS Enable lag time tLAG 4.0 - - tBUS Clock (SCK) high or low time tWSCK 4.0 - - tBUS Data setup time (inputs) tSU 8.0 - - ns Data hold time (inputs) tHI 8.0 - - ns Slave access time (time to data active) tA - - 20 ns Slave MISO disable time tDIS - - 22 ns Data valid after SCK edge tVSCK - - 29 + 0.5 ⋅ tBUS(44) ns Data valid after SS fall tVSS - - 29 + 0.5 ⋅ tBUS(44) ns Data hold time (outputs) tHO 20 - - ns Rise and fall time inputs tRFI -- 8.0 ns Rise and fall time outputs tRFO -- 8.0 ns Note: 45. 0.5 tBUS added due to internal synchronization delay |
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