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MM912F634CV2AP Datasheet(PDF) 84 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 84 Page - Freescale Semiconductor, Inc |
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84 / 335 page ![]() Functional Description and Application Information Low Side Drivers - LSx MM912F634 Freescale Semiconductor 84 4.12.3 Memory Map and Registers 4.12.3.1 Module Memory Map Table 102 shows the register map of the Low Side Driver module. All Register addresses given are referenced to the D2D interface offset. 4.12.3.2 Register Descriptions 4.12.3.2.1 Low Side Control Register (LSCR) Table 102. Low-Side Module - Memory Map Register Name Bit 7 6 5 4 3 2 1 Bit 0 0x30 LSCR R LSOTIE 0 PWMCS2 PWMCS1 PWMLS2 PWMLS1 LS2 LS1 W 0x31 LSSR R LSOTC 0 0 0 LS2CL LS1CL LS2OL LS1OL W 0x32 LSCEN R 0000 LSCEN W Table 103. Low Side Control Register (LSCR) Offset(76) 0x30 Access: User read/write 76 543 210 R LSOTIE 0 PWMCS2 PWMCS1 PWMLS2 PWMLS1 LS2 LS1 W Reset 0 000 00 00 Note: 76. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space. Table 104. LSCR - Register Field Descriptions Field Description 7 - LSOTIE Low Side Over-temperature Interrupt Enable 5 - PWMCS2 PWM Channel Select LS2 0 - PWM Channel 0 selected as PWM Channel 1 - PWM Channel 1 selected as PWM Channel 4 - PWMCS1 PWM Channel Select LS1 0 - PWM Channel 0 selected as PWM Channel 1 - PWM Channel 1 selected as PWM Channel 3 - PWMLS2 PWM Enable for LS2 0 - PWM disabled on LS2 1 - PWM enabled on LS2 (Channel as selected with PWMCS2) 2 - PWMLS1 PWM Enable for LS1 0 - PWM disabled on LS1 1 - PWM enabled on LS1 (Channel as selected with PWMCS1) 1 - LS2 LS2 Enable; LSEN has to be written once to control the LS2 Driver 0 - LS1 LS1 Enable; LSEN has to be written once to control the LS1 Driver |
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