MM912F634CV2AP datasheet(88/335 Pages) FREESCALE

88 / 335 page

Functional Description and Application Information

PWM Control Module (PWM8B2C)

MM912F634

Freescale Semiconductor

4.13.1.3

Block Diagram

Figure 23 shows the block diagram for the 8-bit 2-channel PWM block.

Figure 23. PWM Block Diagram

4.13.2

Signal Description

NOTE

Based on the D2D clock speed, the PWM8B2C module is capable of generating PWM signal

frequencies higher than the maximum output frequency of the connected driver (HS, LS).

Please refer to Section 3.6, “Dynamic Electrical Characteristics" for details.

Do not exceed the driver maximum output frequency!

The PWM module has a total of two internal outputs to control the Low Side Outputs, the High Side Outputs and / or the PTB2

output with pulse width modulation. See Section 4.11, “High Side Drivers - HS", Section 4.12, “Low Side Drivers - LSx" and

Section 4.17, “General Purpose I/O - PTB[0…2]" for configuration details.

4.13.2.1

D2DCLK

Die 2 Die Interface Clock.

4.13.2.2

PWM1 — Pulse Width Modulator Channel 1

This signal serves as waveform output of PWM channel 1.

4.13.2.3

PWM0 — Pulse Width Modulator Channel 0

This signal serves as waveform output of PWM channel 0.

Clock Select

PWM Clock

Period and Duty

Counter

Channel 1

Alignment

Polarity

Control

PWM8B2C

PWM1

Enable

PWM Channels

Period and Duty

Counter

Channel 0

PWM0

D2D Clock

MM912F634CV2AP Datasheet(PDF) 88 Page - Freescale Semiconductor, Inc

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