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MM912F634CV2AP Datasheet(PDF) 53 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 53 Page - Freescale Semiconductor, Inc |
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53 / 335 page  Functional Description and Application Information MM912F634 - Analog Die Overview MM912F634 Freescale Semiconductor 53 4.2.3.1.3 Functional Considerations • The complete Current Sense Module is not available. • The ADC Channel 9 is not available. 4.2.3.2 Wake-up Inputs (Lx) For device options with reduced number of wake up inputs (Lx), the following considerations are to be made. 4.2.3.2.1 Pinout Considerations 4.2.3.2.2 Register Considerations The Lx - Bit for the not available Lx input in the Lx Status Register must be ignored. The Lx Control register for the not available Lx input must be written 0. A not available Lx input can not be selected as Wake-up Source and must have its LxWE bit set to 0. The Wake-up Source Register for not available Lx inputs must be ignored. The Conversion Control Register for the not available Lx analog input (3…8) must always be written 0. Table 70. Lx - Pin Considerations PIN PIN Name for Option 1 New PIN name Comment 31…36 Lx NC One or more Lx wake up inputs are not available based on the analog die option. Not available Lx inputs are not bonded and/or not tested. Connect not available Lx pins (NC) to GND. RLx is not required on those pins. Offset Name 76 54 321 0 0x08 LXR R 0 0 L5 L4 L3 L2 L1 L0 Lx Status Register W 0x09 LXCR R 0 0 L5DS L4DS L3DS L2DS L1DS L0DS Lx Control Register W 0x12 WCR R CSSEL L5WE L4WE L3WE L2WE L1WE L0WE Wake Up Control Register W 0x14 WSR R FWU LINWU L5WU L4WU L3WU L2WU L1WU L0WU Wake Up Source Register W 0x82 ACCR (hi) R CH15 CH14 0 CH12 CH11 CH10 CH9 CH8 ADC Conversion Ctrl Reg W 0x83 ACCR (lo) R CH7 CH6 CH5 CH4 CH3 CH2 CH1 CH0 ADC Conversion Ctrl Reg W |
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