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MM912F634CV2AP Datasheet(PDF) 62 Page - Freescale Semiconductor, Inc |
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MM912F634CV2AP Datasheet(HTML) 62 Page - Freescale Semiconductor, Inc |
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62 / 335 page  Functional Description and Application Information Power Supply MM912F634 Freescale Semiconductor 62 4.4.3 Power Up Behavior / Power Down Behavior - I64 NOTE The behavior explained is essential for the MC9S12I64 MCU die used, as this MCU does have an internal regulator stage, but the LVR function is only active in normal mode MC9S12I64. The shutdown behavior should be considered when sizing the external capacitors CVDD and CVDDX for extended low voltage operation. To guarantee safe power up and down behavior, special dependencies are implemented to prevent unwanted MCU execution. Figure 19 shows a standard power up and power down sequence. Figure 19. Power Up / Down Sequence To avoid any critical behavior, it is essential to have the MCU Power On Reset (POR) active when the analog die reset (RESET_A) is not fully active. As the RESET_A circuity is supplied by VDDX, VDD needs to be below the POR threshold when VDDX is to low to guarantee RESET_A active (3;6). This is achieved with the following implementation. Power Up: • The VDD regulator is enabled after VDDX has reached the VLVRX threshold (1). • Once VDD reaches VLRV, the RESET_A is released (2). • The MCU is also protected by the MCU_LVR. Power Down: • Once VDDX has reached the VLVRX threshold (4), the VDD regulator is disabled and the regulator output is actively pulled down to discharge any VDD capacitance (5). RESET_A is activated as well. • The active discharge guarantees VDD to be below POR level before VDDX discharges below critical level for the reset circuity. 5V VLBI / VLVI Normal Operating Range (not to scale) VLVRX VLVR VPOR_A RESET_A VDDX VDD VSUP VPOR_MCU VROVX VROX 1 4 5 6 2 3 / VLVR_MCU |
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