MM912F634CV2AP datasheet(71/335 Pages) FREESCALE

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Functional Description and Application Information

Resets

MM912F634

Freescale Semiconductor

4.7.2

4.7.2.1

Reset Status Register (RSR)

Reading the Reset Status register will clear the information inside. Writing has no effect. LVR and LVRX are masked when POR

or WUR are set.

Table 83. Reset Status Register (RSR)

Offset(65) 0x15

Access: User read

543

210

WDR

EXR

WUR

LVRX

LVR

POR

Note:

65. Offset related to 0x0200 for blocking access and 0x300 for non blocking access within the global address space.

Table 84. RSR - Register Field Descriptions

Field

Description

5 - WDR

Watchdog Reset - Reset caused by an incorrect serving of the watchdog.

4 - EXR

External Reset - Reset caused by the RESET_A pin driven low externally for > tRSTDF

3 - WUR

Wake-up Reset - Reset caused by a wake-up from Sleep mode. To determine the wake-up source, refer to Section 4.8,

“Wake-up / Cyclic Sense".

2 - LVRX

Low Voltage Reset VDDX - Reset caused by a low voltage condition monitored at the VDDX output.

1 - LVR

Low Voltage Reset VDD - Reset caused by a low voltage condition monitored at the VDD output.(66)

0 - POR

Power On Reset - Supply Voltage was below VPOR.

Note:

66. As the VDD Regulator is shutdown once a LVRX condition is detected, The actual cause could be also a low voltage condition at the

VDDX regulator.

MM912F634CV2AP Datasheet(PDF) 71 Page - Freescale Semiconductor, Inc