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AS4C64M32MD2-25BCN Datasheet(PDF) 102 Page - Alliance Semiconductor Corporation |
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AS4C64M32MD2-25BCN Datasheet(HTML) 102 Page - Alliance Semiconductor Corporation |
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102 / 129 page ![]() 10.2 IDD Specifications IDD values are for the entire operating voltage range, and all of them are for the entire standard range, with the exception of IDD6ET which is for the entire extended temperature range. Table 47 — LPDDR2 IDD Specification Parameters and Operating Conditions Parameter / Condition Symbol Power Supply 400MHz Units Notes x16 x32 Operating one bank active-precharge current (SDRAM): IDD01 VDD1 6 6 mA 3 tCK = tCK(avg)min; tRC = tRCmin; IDD02 VDD2 35 35 mA 3 CKE is HIGH; IDD0IN VDDCA + VDDQ 5 5 mA 3,4 CS# is HIGH between valid commands; CA bus inputs are SWITCHING; Data bus inputs are STABLE Idle power-down standby current: IDD2P1 VDD1 0.4 mA 3 tCK = tCK(avg)min; CKE is LOW; IDD2P2 VDD2 1.0 mA 3 CS# is HIGH; All banks/RBs idle; IDD2PIN VDDCA + VDDQ 0.1 mA 3,4 CA bus inputs are SWITCHING; Data bus inputs are STABLE Idle power-down standby current with clock stop: IDD2PS1 VDD1 0.4 mA 3 CK =LOW, CK# =HIGH; CKE is LOW; IDD2PS2 VDD2 1.0 mA 3 CS# is HIGH; All banks/RBs idle; IDD2PSIN VDDCA + VDDQ 0.1 mA 3,4 CA bus inputs are SWITCHING; Data bus inputs are STABLE Idle non power-down standby current: IDD2N1 VDD1 1 1 mA 3 tCK = tCK(avg)min; IDD2N2 VDD2 8 8 mA 3 CKE is HIGH; IDD2NIN VDDCA + VDDQ 5 5 mA 3,4 CS# is HIGH; All banks/RBs idle; CA bus inputs are SWITCHING; Data bus inputs are STABLE Idle non power-down standby current with clock stop: IDD2NS1 VDD1 1 1 mA 3 CK =LOW, CK# =HIGH; IDD2NS2 VDD2 4 4 mA 3 CKE is HIGH; IDD2NSIN VDDCA + VDDQ 5 5 mA 3,4 CS# is HIGH; All banks/RBs idle; CA bus inputs are SWITCHING; Data bus inputs are STABLE Active power-down standby current: IDD3P1 VDD1 2 2 mA 3 tCK = tCK(avg)min; IDD3P2 VDD2 4 4 mA 3 CKE is LOW; IDD3PIN VDDCA + VDDQ 0.1 0.1 mA 3,4 CS# is HIGH; One bank/RB active; CA bus inputs are SWITCHING; Data bus inputs are STABLE Active power-down standby current with clock stop: IDD3PS1 VDD1 2 2 mA 3 CK=LOW, CK#=HIGH; IDD3PS2 VDD2 4 4 mA 3 CKE is LOW; IDD3PSIN VDDCA + VDDQ 0.1 0.1 mA 3,4 CS# is HIGH; One bank/RB active; CA bus inputs are STABLE; Data bus inputs are STABLE AS4C64M32MD2-25BCN AS4C128M16MD2-25BCN Confidential - 102/129 - Rev.1.0 July 2016 |
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