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AS4C64M32MD2-25BCN Datasheet(PDF) 103 Page - Alliance Semiconductor Corporation

Part # AS4C64M32MD2-25BCN
Description  Deep Power Down Mode
PDF  129 Pages
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Manufacturer  ALSC [Alliance Semiconductor Corporation]
Direct Link  https://www.alliancememory.com
Logo ALSC - Alliance Semiconductor Corporation

AS4C64M32MD2-25BCN Datasheet(HTML) 103 Page - Alliance Semiconductor Corporation

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Parameter / Condition
Symbol
Power
Supply
400 MHz
Units
Notes
x16
x32
Active non power-down standby current:
IDD3N1
VDD1
2
2
mA
3
tCK = tCK(avg)min;
IDD3N2
VDD2
12
12
mA
3
CKE is HIGH;
IDD3NIN
VDDCA
+
VDDQ
5
5
mA
3,4
CS# is HIGH;
One bank/RB active;
CA bus inputs are SWITCHING;
Data bus inputs are STABLE
Active non power-down standby current with clock stop:
IDD3NS1
VDD1
2
2
mA
3
CK=LOW, CK#=HIGH;
IDD3NS2
VDD2
6
6
mA
3
CKE is HIGH;
IDD3NSIN
VDDCA
+
VDDQ
5
5
mA
3,4
CS# is HIGH;
One bank/RB active;
CA bus inputs are SWITCHING;
Data bus inputs are STABLE
Operating burst read current:
IDD4R1
VDD1
2
2
mA
3
tCK = tCK(avg)min;
IDD4R2
VDD2
120
105
mA
3
CS# is HIGH between valid commands;
IDD4RIN
VDDCA
5
5
mA
3
One bank/RB active;
IDD4RQ
VDDQ
55
110
mA
3,6
BL = 4; RL = RLmin;
CA bus inputs are SWITCHING;
50% data change each burst transfer
Operating burst write current:
IDD4W1
VDD1
2
2
mA
3
tCK = tCK(avg)min;
IDD4W2
VDD2
130
110
mA
3
CS# is HIGH between valid commands;
IDD4WIN
VDDCA
+
VDDQ
9
13
mA
3,4
One bank/RB active;
BL = 4; WL = WLmin;
CA bus inputs are SWITCHING;
50% data change each burst transfer
All Bank Refresh Burst current:
IDD51
VDD1
10
10
mA
3
tCK = tCK(avg)min;
IDD52
VDD2
90
90
mA
3
CKE is HIGH between valid commands;
IDD5IN
VDDCA
+
VDDQ
5
5
mA
3,4
tRC = tRFCabmin;
Burst refresh;
CA bus inputs are SWITCHING;
Data bus inputs are STABLE;
All Bank Refresh Average current:
IDD5AB1
VDD1
2
2
mA
3
tCK = tCK(avg)min;
IDD5AB2
VDD2
10
10
mA
3
CKE is HIGH between valid commands;
IDD5ABIN
VDDCA
+
VDDQ
5
5
mA
3,4
tRC = tREFI;
CA bus inputs are SWITCHING;
Data bus inputs are STABLE;
Per Bank Refresh Average current:
IDD5PB1
VDD1
2
2
mA
1,3
tCK = tCK(avg)min;
IDD5PB2
VDD2
20
20
mA
1,3
CKE is HIGH between valid commands;
IDD5PBIN
VDDCA
+
VDDQ
5
5
mA
1,3,4
tRC = tREFI/8;
CA bus inputs are SWITCHING;
Data bus inputs are STABLE;
Self refresh current (Standard Temperature Range):
IDD61
45
℃
VDD1
0.12
mA
2,3,8,9
,10
CK=LOW, CK#=HIGH;
85
℃
0.6
CKE is LOW;
I DD62
45
℃
VDD2
0.32
mA
2,3,8,9
,10
CA bus inputs are STABLE;
85
℃
1.8
Data bus inputs are STABLE;
IDD6IN
45
℃
VDDCA
+
VDDQ
0.01
mA
2,3,4,8
,9,10
Maximum 1x Self-Refresh Rate;
85
℃
0.1
AS4C64M32MD2-25BCN
AS4C128M16MD2-25BCN
Confidential
- 103/129 -
Rev.1.0 July 2016



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