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BQ76PL455APFCT Datasheet(PDF) 28 Page - Texas Instruments

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Part # BQ76PL455APFCT
Description  16-Cell Industrial Integrated Battery Monitor
PDF  125 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

BQ76PL455APFCT Datasheet(HTML) 28 Page - Texas Instruments

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bq76PL455A
SLUSCL0A – SEPTEMBER 2016 – REVISED OCTOBER 2016
www.ti.com
Product Folder Links: bq76PL455A
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Copyright © 2016, Texas Instruments Incorporated
7.3.9.3 Baud Rate Selection
The baud rate of the communications channel to the microcontroller is set in the COMCONFIG[BAUD] register
for 125k-250k-500k-1M baud rates. The default rate after a communications reset is 250k. The default rate after
a POR is the rate selected by the value stored in EEPROM for the COMCONFIG[BAUD] register.
When the value in this register changes, the new rate takes effect after the complete reception of a valid packet
containing the new setting including the CRC. This should send the next packet at the new baud rate and all
packets transmitted by the device will be at the new rate. It is possible to change the baud rate at any time and,
optionally, store the new baud rate in the EEPROM as a new POR default. After changing the baud rate, observe
a minimum wait period of 10 µs before sending the first packet at the new baud rate.
The value in the COMCONFIG[BAUD] register only affects the baud rate used in microcontroller communications
on the TX and RX pins. The daisy-chain vertical communication bus rate is at a higher fixed rate and not user
modifiable. All devices in the stack must have the same baud rate setting as the base device to read data from
stacked devices.
7.3.9.4 Communication Clear (Break) Detection
Use communications clear to reset the receiver to re-synchronize looking for the start of frame.
The receiver continuously monitors the RX line for a break (<BRK>) condition. A <BRK> is detected when the
RX line is held low for at least tCOMM_BREAKmin bit periods (approximately 1 character times). Sending for more
than tCOMM_BREAKmax bit periods may result in recognition of a communication reset instead of the intended
communication clear. When detected, a <BRK> will set the STATUS[COMM_CLEAR] flag.
7.3.9.5 Communication Reset Detection
Detection of a communication reset occurs when the RX line is held low for more than approximately
tCOMM_RESETmin. The primary purpose of sending a communications reset is to recover the device in the event the
baud rate is inadvertently changed or unknown. The baud rate resets unconditionally to the FACTORY default
value of 250 kb/s, REGARDLESS of the value stored in the EEPROM COMCONFIG register. This sets the baud
rate to a known, fixed rate (250k baud), and the STATUS[COMM_RESET] flag.
7.3.9.6 Communication Timeouts
Programming is available for two timeout values based on the absence of a valid packet from either UART or
differential stack communications. The times are set in the two-bit fields of the Communications Timeout (CTO)
register. A valid packet definition is any packet with a valid CRC.
7.3.9.6.1
Communications Timeout Fault
Register CTO[COMM_TMOUT_PER] sets the period with no valid communications from either communications
interface before sensing a COMM_TIMEOUT fault.
Always set CTO[COMM_TMOUT_PER] to be set less than the CTO[COMM_PD_PER] to get a communications
timeout fault before SHUTDOWN occurs.
7.3.9.6.2
Communications Timeout Power-Down (SHUTDOWN)
CTO[COMM_PD_PER] forces the part to shut down when this time is exceeded without a valid communication
from either the UART or the differential stack communications.
7.3.10 Stacked Daisy-Chain Communications
In the stacked configuration, the main microcontroller first communicates through a bq76PL455A device using
the UART communications interface, see Figure 17. Communication is then relayed up the chain of connected
slave bq76PL455A devices using a proprietary differential communications protocol over AC-coupled differential
links interconnected by the COMMH+/– and COMML+/– pins.
Each device in the daisy chain buffers the signal drive levels. The signal is not re-clocked or filtered; it passes
through the device without change and the entire stack sees all data sequencing regardless of the target device.
The packet is not validated before being transmitted to the next device in the daisy chain. The uniquely
addressed or group addressed device acts on the command (that is, begins an ADC conversion of the inputs) as
soon as it receives and validates the packet for correct address, message contents, and CRC.



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