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BQ76PL455APFCT Datasheet(PDF) 62 Page - Texas Instruments |
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BQ76PL455APFCT Datasheet(HTML) 62 Page - Texas Instruments |
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62 / 125 page ![]() 62 bq76PL455A SLUSCL0A – SEPTEMBER 2016 – REVISED OCTOBER 2016 www.ti.com Product Folder Links: bq76PL455A Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7.5.3.6 Broadcast Write without Response Command Frame A Broadcast Write without Response command is indicated when FRM_TYPE = 1 and REQ_TYPE = 7 (111 binary). In this example, the register address size is 8-bits (ADDR_SIZE = 0) and the data length written is 1 byte (DATA_SIZE). Note that since this command is for all devices, there is no Device Address/Group ID byte in the command frame. No Response Frame is expected to be returned. 7 6 5 4 3 2 1 0 Command Frame Init 1 111 (binary) 0 001 (binary) Register Address C8 Data 12 CRC (MSB) 86 CRC (LSB) 3E This example writes 12 (hex) into one of the Scratchpad Register bytes at address 200 (C8 hex) on all targeted devices. See Register Details for further information on the effects of changing register values. 7.5.4 Response Frame A Response Frame is indicated when FRM_TYPE = 0. Note that bits 6 through 0 in the Frame Initialization byte use a different format from the Command Frame format, as described in Frame Initialization Byte. In this example, the response data length is 3 bytes (RESP_BYTES – 1 = 2). There is support for data lengths from 1 through 128 bytes. Since the protocol described here is for a single initiator (microcontroller) system, the initiator is always the intended target of a Response Frame. If a command frame targets more than one device, responses go back to the initiator first from the device at the highest address in the targeted group, then the next highest address, and so forth until all devices in the targeted group have responded. Each device will respond with a complete response frame, which includes a Frame Initialization byte, one or more data bytes, and two CRC bytes. If the command frame targets more than one device and the target register of that command frame is the Command Register, then there may be a delay in the responses. This delay is due to the time required for the targeted bq76PL455A devices to sample, store, and respond with their newly sampled data. The delay in the responses will be dependent on the sampling period and channel selection configuration of each targeted device. 7 6 5 4 3 2 1 0 Response Frame Init 0 (binary) 0000010 (binary) Data 9B Data 8C Data 7D CRC (MSB) D4 CRC (LSB) B6 7.6 Register Maps 7.6.1 Conventions and Notations The following conventions are in use throughout the document. • Keywords that refer to specific software registers are in ALL CAPITALS. • Each byte in a multi-byte register can be addressed individually. The format is big endian with the most- significant byte stored in the lowest physical address. Data are returned in lowest-to-highest address order. • Locations marked "RESERVED" should not be written to, and always return 0. • Bits marked "RESERVED" or "reserved" should be written as 0, unless otherwise specified. |
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