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BQ76PL455APFCT Datasheet(PDF) 84 Page - Texas Instruments

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Part # BQ76PL455APFCT
Description  16-Cell Industrial Integrated Battery Monitor
PDF  125 Pages
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Manufacturer  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI1 - Texas Instruments

BQ76PL455APFCT Datasheet(HTML) 84 Page - Texas Instruments

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bq76PL455A
SLUSCL0A – SEPTEMBER 2016 – REVISED OCTOBER 2016
www.ti.com
Product Folder Links: bq76PL455A
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Copyright © 2016, Texas Instruments Incorporated
7.6.3.34 FAULT_SYS 0x60 (96) System Fault
BIT
NAME
DESCRIPTION
[7]
SYS_RESET
Write '1': Reset the bit to zero.
Write '0': No effect
Read '1': A system reset has been detected.
[6]
COMM_TIMEOUT
Write '1': Reset the fault condition.
Write '0': No effect
Read '1': Communications timeout has been detected.
[5]
VDIG_WAKE_FAULT
Write '1': Reset the fault condition.
Write '0': No effect
Read '1': VDIG supply was already high on wakeup. This could happen if the NPN transistor
were leaking and preventing VDIG from going away when VP/VDIG shuts down. It could also
occur if the chip is reset (in which case the VDIG supply remained on) or if it was shut down too
briefly to allow the supply time to ramp down. This bit is provided to allow detection of leakage
current into the supply during shutdown.
This bit is checked only set by the device during the device initialization sequence. Once
cleared, it will not set again until the block is reset.
[4]
INT_TEMP_FAULT
Write '1': Reset the fault condition.
Write '0': No effect
Read '1': Overtemperature condition in the digital die
If UNLATCHED_FAULT is set, this bit is self-clearing.
[3]
VDIG_FAULT
Write '1': Reset the fault condition.
Write '0': No effect
Read '1': VDIG supply failure detected in the analog die.
[2]
VM_FAULT
Write '1': Reset the fault condition.
Write '0': No effect
Read '1': VM supply failure detected in analog die.
[1]
VP_FAULT
Write '1': Reset the fault condition.
Write '0': No effect
Read '1': VP supply failure detected in analog die.
[0]
VP_CLAMP
Write '1': Reset the fault condition.
Write '0': No effect
Read '1': NPNB pin is monitored and clamped to keep the NPNB pin from going over voltage.
7.6.3.35 FAULT_DEV 0x61–62 (97–98) Chip Fault
BIT
NAME
DESCRIPTION
[15]
USER_CKSUM_ERR
Write '1': No effect
Write '0': No effect
Read '1': A checksum error was detected in the registers. This fault is self-clearing when the
condition goes away.
[14]
FACT_CKSUM_ERR
Write '1': Reset the fault condition.
Write '0': No effect
Read '1': A checksum error was detected in the factory registers.
[13]
ANALOG_FAULT_ERR
Write '1': Reset the fault condition.
Write '0': No effect
Read '1': The analog die is reporting an error, but it cannot tell what the error is (no error
condition has been detected). This may be caused by a single event upset, or possibly the
device has failed. If this occurs consistently, the device should be removed from service.
[12]
HREF_FAULT
Write '1': Reset the fault condition.
Write '0': No effect
Read '1': Analog die 4.5-V reference measurement was out of range.



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