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BQ76PL455APFCT Datasheet(PDF) 69 Page - Texas Instruments |
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BQ76PL455APFCT Datasheet(HTML) 69 Page - Texas Instruments |
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69 / 125 page ![]() 69 bq76PL455A www.ti.com SLUSCL0A – SEPTEMBER 2016 – REVISED OCTOBER 2016 Product Folder Links: bq76PL455A Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated 7.6.3 Register Details NOTE The terms "Write without Response", "Write", and "write" are equivalent and synonymous. The words "Read" and "read" are equivalent to "Write with Response". 7.6.3.1 SREV 0x00-01 (0-1) Device Version This register provides the digital and analog die revisions used in the bq76PL455A device. BIT NAME DESCRIPTION [15:8] DDIE_VER Digital die version number (byte address 0) [7:0] ADIE_VER Analog die version number (byte address 1) 7.6.3.2 CMD 0x02 (2) Command Write_With_Response requests directly targeted to this register cause the specified command to execute and the corresponding results to return a response. The number of bytes returned will be based on the bits selected in the CHANNELS register. Some bits in the CHANNELS register have more than one value returned, refer to their descriptions under the CHANNELS register. NOTE This transaction will return results from the command, not a read of register values. It is not possible to read the last value written to this register. Indirect reads of this register produce an undefined value for this register. A command sent to this register without writing the CHANNELS or OVERSMPL registers in the same frame uses the values currently in those registers. If a command writes the CHANNELS or OVERSMPL registers in the same frame then sends the command to the register, the new register values will overwrite the current register values and the execution of the command uses the new values. Requested values return MSB first in the order that they exist in the CHANNELS register, starting with the MSB (Cell 16, Cell 15 …). No values return for bits not selected in the CHANNELS register. BIT NAME DESCRIPTION [7:6] Reserved Write these bits as 0. [4:0] resp_addr If set by a Broadcast_Write_With_Response or Group_Write_With_Response request, devices will respond in successive order. These bits set the address of the highest device in the group/set to respond. This value has no effect for other transaction types. 7.6.3.3 CHANNELS 0x03–06 (3–6) Channel Select When the indicated bit is set, the named channel is included when a CMD (COMMAND) is executed in the Command register. BIT NAME DESCRIPTION [31:16] CMD_VSEL This bitmask determines which battery cell voltages are used when a COMMAND is executed. CMD_VSEL[0] (bit 16) corresponds to cell 1, bit 31 corresponds to cell 16. For each bit in this field: 0 = Do not include this cell voltage. 1 = Include this cell voltage. [15:8] CMD_ASEL This bitmask determines which auxiliary channels are used when a COMMAND is executed. CMD_ASEL[0] (bit 8) corresponds to AUX0. For each bit in this field: 0 = Do not include this AUX channel. 1 = include this AUX channel. [7] CMD_GTSEL Digital die temperature. Usually used as part of self-testing. |
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