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BQ76PL455APFCT Datasheet(PDF) 78 Page - Texas Instruments |
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BQ76PL455APFCT Datasheet(HTML) 78 Page - Texas Instruments |
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78 / 125 page ![]() 78 bq76PL455A SLUSCL0A – SEPTEMBER 2016 – REVISED OCTOBER 2016 www.ti.com Product Folder Links: bq76PL455A Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) Recommended setting: 0x00 7.6.3.21 SMPL_SLY1 0x3D (61) Initial Sampling Delay BIT NAME DESCRIPTION [7] RSVD Reserved — always write/read as zero. [6:4] INIT_VOL_DLY This value specifies the delay from changing the MUX to the first cell voltage until the channel is sampled. This delay is applied only once per sample request, even if oversampling is used. 0 = no delay (Recommended(1))* 1 = 2 µs 2 = 5 µs 3 = 10 µs 4 = 20 µs 5 = 50 µs 6 = 100 µs 7 = 200 µs This value is useful when all the cell voltages should return values that are nearly the same, as it allows one settling delay and shorter channel-to-channel delays. See the Application and Implementation section for using non-zero settings in accordance with specific design criteria requirements. [3] RSVD Reserved — always write/read as zero [2:0] INIT_AUX_DLY This value specifies the delay from changing the MUX to the first auxiliary channel until the channel is sampled. This delay is applied only once per sample request, even if oversampling is used. 0 = no delay (Recommended(1))* 1 = 2 µs 2 = 5 µs 3 = 10 µs 4 = 20 µs 5 = 50 µs 6 = 100 µs 7 = 200 µs This value is useful when all the AUX voltages should return values that are nearly the same, as it allows one settling delay and shorter channel-to-channel delays. See the Application and Implementation section for using non-zero settings in accordance with specific design criteria requirements. 7.6.3.22 Cell_CSPER 0x3E (62) Cell Voltage and Internal Temperature Sampling Interval BIT NAME DESCRIPTION [7:4] ADC_PERIOD_VOL This value sets the ADC sampling interval that will be used for the cell voltages. [3:0] ADC_PERIOD_HTEMP This value sets the ADC sampling interval that will be used for the analog die internal temperature channel. See Table 9 for settings. |
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