MM912F634CV2AP datasheet(186/335 Pages) FREESCALE

186 / 335 page

Functional Description and Application Information

Memory Mapping Control (S12SMMCV1)

MM912F634

Freescale Semiconductor

186

4.28.4

Initialization/Application Information

4.28.4.1

CALL and RTC Instructions

CALL and RTC instructions are not interruptable CPU instructions that automate page switching in the program page window.

The CALL instruction is similar to the JSR instruction, but the subroutine that is called can be located anywhere in the local

address space or in any Flash or ROM page visible through the program page window. The CALL instruction calculates and

stacks a return address, stacks the current PPAGE value and writes a new instruction-supplied value to the PPAGE register. The

PPAGE value controls which of the 256 possible pages is visible through the 16 kbyte program page window in the 64 kbyte local

CPU memory map. Execution then begins at the address of the called subroutine.

During the execution of the CALL instruction, the CPU performs the following steps:

Writes the current PPAGE value into an internal temporary register and writes the new instruction-supplied PPAGE

value into the PPAGE register

Calculates the address of the next instruction after the CALL instruction (the return address) and pushes this 16-bit value

onto the stack

Pushes the temporarily stored PPAGE value onto the stack

Calculates the effective address of the subroutine, refills the queue and begins execution at the new address

This sequence is not interruptable. There is no need to inhibit interrupts during the CALL instruction execution. A CALL instruction

can be performed from any address to any other address in the local CPU memory space.

The PPAGE value supplied by the instruction is part of the effective address of the CPU. For all addressing mode variations

(except indexed-indirect modes) the new page value is provided by an immediate operand in the instruction. In indexed-indirect

variations of the CALL instruction a pointer specifies memory locations where the new page value and the address of the called

subroutine are stored. Using indirect addressing for both the new page value and the address within the page allows usage of

values calculated at run time rather than immediate values that must be known at the time of assembly.

The RTC instruction terminates subroutines invoked by a CALL instruction. The RTC instruction unstacks the PPAGE value and

the return address and refills the queue. Execution resumes with the next instruction after the CALL instruction.

During the execution of an RTC instruction the CPU performs the following steps:

Pulls the previously stored PPAGE value from the stack

Pulls the 16-bit return address from the stack and loads it into the PC

Writes the PPAGE value into the PPAGE register

Refills the queue and resumes execution at the return address

This sequence is uninterruptable. The RTC can be executed from anywhere in the local CPU memory space.

The CALL and RTC instructions behave like JSR and RTS instruction, they however require more execution cycles. Usage of

JSR/RTS instructions is therefore recommended when possible and CALL/RTC instructions should only be used when needed.

The JSR and RTS instructions can be used to access subroutines that are already present in the local CPU memory map (i.e. in

the same page in the program memory page window for example). However calling a function located in a different page requires

usage of the CALL instruction. The function must be terminated by the RTC instruction. Because the RTC instruction restores

contents of the PPAGE register from the stack, functions terminated with the RTC instruction must be called using the CALL

instruction even when the correct page is already present in the memory map. This is to make sure that the correct PPAGE value

will be present on stack at the time of the RTC instruction execution.

MM912F634CV2AP Datasheet(PDF) 186 Page - Freescale Semiconductor, Inc

MM912F634CV2AP Datasheet(HTML) 186 Page - Freescale Semiconductor, Inc

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